Patents Represented by Attorney, Agent or Law Firm Matthew S. Anderson
  • Patent number: 5764570
    Abstract: A reading circuit for a multibit register has a differential stage that is configured as an output latch by one of two control phases required by the circuit after the discrimination phase of a reading cycle a single NOR gate, the output of which is provided with anti-overshoot means, enables the performance of a reading cycle. An input of the differential stage, is connectable to a common sensing line to which all the cells of the register are coupled in an OR configuration, while the other input is connectable to a reference current generator.
    Type: Grant
    Filed: August 2, 1996
    Date of Patent: June 9, 1998
    Assignee: SGS-Thomson Microelectronics, S.r.l.
    Inventor: Luigi Pascucci
  • Patent number: 5764243
    Abstract: A rendering system with multi-pixel span processing capability. When 3D graphics processes are not required, 2D data is processed in multi-pixel span fragments. Span fragments permit parallel processing of multiple pixels in a serial architecture, and permit VRAM block fills for accelerated processing under optimal conditions.
    Type: Grant
    Filed: May 1, 1996
    Date of Patent: June 9, 1998
    Assignee: 3DLabs Inc. Ltd.
    Inventor: David Robert Baldwin
  • Patent number: 5764228
    Abstract: A 3D graphics system in which a pre-rendering stage is combined with a rendering stage. Any GUI window which is not completely displayed on-screen (because it extends past screen boundaries or is overlapped by other windows, etc.), is divided into at least two portions, e.g. rectangles, for scissoring operations. If a primitive appears at least partially in some rectangle, rendering setup data is calculated, then applied against each rectangle in which it appears for a scissoring operation, and the portion of the primitive in that rectangle which survives the scissor is then rendered. The rendering data is stored between each scissoring function, and is not recalculated. Any portion of the primitive which does not appear in a rectangle is not rendered, thereby eliminating any rendering overhead for any primitive which would be completely hidden anyway.
    Type: Grant
    Filed: May 1, 1996
    Date of Patent: June 9, 1998
    Assignee: 3dLabs Inc., Ltd.
    Inventor: David Robert Baldwin
  • Patent number: 5764495
    Abstract: A variable-input-voltage variable-switching-frequency power converter with a minimum frequency limit. The switching frequency never goes below a certain minimum while the converter is on. Thus switching frequency is dependent on input voltage, for input voltages in one range, and is NOT dependent on input voltage, for input voltages in another range.
    Type: Grant
    Filed: December 31, 1996
    Date of Patent: June 9, 1998
    Assignee: Compaq Computer Corporation
    Inventor: Richard A. Faulk
  • Patent number: 5761322
    Abstract: A portable computer system including sealed acoustic suspension speaker enclosures which are each molded of a high density-low-density polymer combination, so that the low-density polymer can provide good sealing to adjacent surfaces. Preferably, neither speaker enclosure is sealed as a free standing unit, but the acoustic seal is completed only when the speaker enclosure is in place inside the portable computer.
    Type: Grant
    Filed: December 31, 1996
    Date of Patent: June 2, 1998
    Assignee: Compaq Computer Corporation
    Inventors: Patrick V. Illingworth, David E. Gough
  • Patent number: 5748128
    Abstract: A digital/analog quadratic converter (DACQ) composed by a pair of linear converters connected in cascade has a direct coupling of the output node of the first converter (DAC1) with a node of a R-2R type resistive network of the second converter (DAC2) corresponding to the LSB stage of the R-2R type resistive network. High impedance nodes, notably the input node of the second linear converter, are advantageously eliminated from the "current path" thus markedly reducing the problems of relatively long settling times of high impedance nodes (having intrinsically large parasitic capacitances associated therewith). The peculiar architecture of the quadratic converter provides also for a remarkable simplification of the circuit.
    Type: Grant
    Filed: May 13, 1996
    Date of Patent: May 5, 1998
    Assignee: SGS-Thomson Microelectronics, S.r.l.
    Inventors: Melchiorre Bruccoleri, Marco Demicheli, Giuseppe Patti, Valerio Pisati
  • Patent number: 5748002
    Abstract: Systems, methods, and probe devices for electronic monitoring and characterization using single-ended coupling of a load-pulled oscillator to a system under test.
    Type: Grant
    Filed: January 26, 1996
    Date of Patent: May 5, 1998
    Assignee: Phase Dynamics Inc.
    Inventors: Bentley N. Scott, Samuel R. Shortes
  • Patent number: 5745002
    Abstract: A switched capacitance circuit, using a switched operational amplifier structure as an input switch of the switched capacitance, is provided with a new biasing circuit. An additional switched capacitor, switched alternately to power supply and to ground, is connected to the output side of the primary switched capacitor. Precision is retained while ensuring a rail-to-rail dynamic range, without requiring boosted control phases. Special arrangements may be implemented for controlling the amplitude of switching spikes when so required. A fully differential embodiment is also feasible with additional advantages.
    Type: Grant
    Filed: October 19, 1994
    Date of Patent: April 28, 1998
    Assignee: SGS-Thomson Microelectronics, S.r.l.
    Inventors: Andrea Baschirotto, Rinaldo Castello, Federico Montecchi, Angelo Nagari
  • Patent number: 5734375
    Abstract: A method of determining an object's position and associated apparatus provides positional information in a form that may be conveniently communicated to a computer to calculate the object's position. In a preferred embodiment, representatively incorporated in a computer keyboard, a method of determining an object's position includes forming an optical grid of reflected beacons and detecting an obstruction of the reflected beacons. The preferred embodiment apparatus utilizes a single light source and a single light sensor to detect an object's position in two dimensions.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: March 31, 1998
    Assignee: Compaq Computer Corporation
    Inventors: Richard M. Knox, John R. Masters, Kevin F. Clancy
  • Patent number: 5726604
    Abstract: The dynamic range of operation of a differential transconductance input stage is reduced when the amplitude of the input signal decreases, thus reducing the level of the noise that is generated by the input stage. A DC signal representative of the sensed amplitude of the input signal is employed for either reducing the value of a common, emitter-degenerating resistance or of the bias current that is forced in the two branches of the differential input stage.
    Type: Grant
    Filed: September 15, 1993
    Date of Patent: March 10, 1998
    Assignee: SGS-Thomson Microelectronics, S.r.l.
    Inventors: Andrea Mario Onetti, Domenico Rossi
  • Patent number: 5710811
    Abstract: The speech circuit matches the impedance of the telephone line by synthesizing a complex impedance using a positive feedback loop which has a single resistor (11), and cancels out the side tone using a subtractor (20') which extracts from the signal (Va) coming from the line a signal (Vb) correlated to the signal to be transmitted. In order to achieve cancellation of the side tone unaffected by the noise produced in the impedance synthesizing circuits, the signal (Vb) is derived by processing the signal present in the resistor (11) at the output of the feedback loop.
    Type: Grant
    Filed: April 10, 1996
    Date of Patent: January 20, 1998
    Assignee: SGS-Thomson Microelectronics, S.r.l.
    Inventors: Luciano Tomasini, Rinaldo Castello, Ivan Bietti, Giancarlo Clerici
  • Patent number: 5706182
    Abstract: Converter topologies in which two separate switching transistors and two capacitors are used on the input side. Preferably the two transistors are switched alternately, to alternately pull down different nodes in an inductor-capacitor chain. Two capacitors are interposed in series between an input inductor on the input and a transformer primary winding. Preferably the two transistors are connected with their parasitic diodes in opposite senses, so that one can source current from a first node to ground when off, and the other can sink current from a second node to ground when off.
    Type: Grant
    Filed: December 31, 1996
    Date of Patent: January 6, 1998
    Assignee: Compaq Computer Corporation
    Inventor: Richard A. Faulk
  • Patent number: 5694302
    Abstract: A power conversion circuit, in which a flyback converter is modified with additional elements to provide both dissipationless snubbing and also input ripple cancellation. This is achieved by appropriate connection of an additional winding to the isolating transformer, without any need for a second transformer. The configuration of the secondary is conventional, and the switching transistor is connected in series with the primary winding across DC inputs (taken e.g. from a full-wave-rectified line voltage). The additional winding is connected on the primary side, and preferably has a near-unity turns ratio with the primary which is the inverse of the coupling coefficient. However, the additional winding is not connected between the two DC inputs, but instead has one end coupled through an intermediate capacitor to the corresponding end of the primary, and the other end coupled through a capacitor to the negative DC input.
    Type: Grant
    Filed: August 20, 1996
    Date of Patent: December 2, 1997
    Assignee: Compaq Computer Corporation
    Inventor: Richard A. Faulk
  • Patent number: 5684449
    Abstract: A compatible interface for an installation to control household machines that comprises an omnibus line having at least two first line wires used for a supply current, information signals being transmitted on the two first wires and/or on two second line wires, wherein said interface comprises: a circuit to recognize whether information signals are sent on the two first wires or on the two second wires and to transmit a reception identification signal to a household machine; and a current regulation circuit connected to the two first wires to give a stabilized current supply even if information signals are transmitted on the two second wires. Applications include control of household (home automation), industrial, or professional installations.
    Type: Grant
    Filed: May 23, 1995
    Date of Patent: November 4, 1997
    Assignee: SGS-Thomson Microelectronics, S.A.
    Inventor: Maurice Gilbert Le Van Suu