Abstract: A method and structure for filling an opening in a substrate which includes positioning a sheet above the substrate and punching the sheet into the opening in the substrate, wherein the sheet and the substrate have similar shrinkage characteristics when subjected to a subsequent sintering process.

Abstract: A semiconductor structure (and method for manufacturing the same) comprises an active array of first elements having a first manufacturing precision, a peripheral region surrounding the active array, the peripheral region including second elements having a second manufacturing precision less than the first manufacturing precision, wherein the second elements are isolated from the active array and comprise passive devices for improving operations of the active array.

Abstract: A semiconductor integrated circuit device includes a main memory portion and a sub memory portion including a plurality of memory cell groups, wherein a bi-directional data transfer is performed between an arbitrary area of the main memory portion and each of the plurality of the memory cell groups and the plurality of the memory cell groups function as independent cache memories, respectively. Therefore, the semiconductor integrated circuit device of the present invention has a main memory suitable for being accessed from a plurality of data processors.

Abstract: In current manufacturing practices, if a process results in a partial product which is outside its specification, it is either sent back to be reworked, or is scrapped. This results in unacceptable waste. The present invention comprises a method for minimizing this wasted work and materials, by corrective actions by subsequent processes. This approach is general, and is capable of correcting the effects of out-of-specs manufacturing process conditions, including the salvaging of partial product, thereby obviating the need for rework or scrap.

Abstract: A method for accommodating electronic commerce in a semiconductor manufacturing capacity market. The method comprises the steps of identifying a plurality of players in the semiconductor manufacturing capacity market, each of which players can solicit capacity in semiconductor manufacturing capacity market; providing a neutral third-party, the neutral third party and the plurality of players configured in a hub arrangement for communicating with each of the plurality of players in semiconductor manufacturing capacity trades; and realizing an open market conditionality between each of the plurality of players and the neutral third party so that the semiconductor manufacturing capacity supplied by one or more of the players can be bought and sold among the players; and, the neutral third party can preserve anonymity of each of the plurality of players soliciting semiconductor manufacturing capacity.

Abstract: A method and system for preventing counterfeiting of an item, include an interrogatable tag attached to the item. The item includes visible indicia for comparison with secret, non-duplicable information stored in the tag designating authenticity.

Abstract: A synchronous delay circuit system comprises an input buffer having a first delay time and receiving an external clock, a clock driver having a second delay time and for an internal clock, a dummy delay circuit having a delay time equal to a sum of the first delay time and the second delay time, a first delay circuit array formed of a predetermined number of delay circuits having a predetermined delay time, for measuring a time difference of a constant period from an output of the dummy delay circuit, a second delay circuit array formed of a predetermined number of delay circuits having a predetermined delay time, for reproducing the measured time difference to output the reproduced time difference to the clock driver, a circuit for measuring the frequency of the external clock to output a frequency measurement signal, and a delay time control circuit responding to the frequency measurement signal to control the traveling speed of a pulse or a signal edge in the first delay circuit array and in the second del

Abstract: In a CCD type solid state image pickup device including a semiconductor substrate having photo/electro conversion portions and a first insulating layer formed on the semiconductor substrate, a plurality of charge transfer electrodes are formed on the first insulating layer and are a double structure formed by a first conductive layer and a second conductive layer having a lower resistance value than the first conductive layer. A second insulating layer is interposed between two adjacent ones of the charge transfer electrodes.

Abstract: A method for electronic generation of sounds, based on the notes in a musical scale, including assigning respective sounds to the notes, such that each sound is perceived by a listener as qualitatively distinct from the sound assigned to an adjoining note in the scale. An input is received indicative of a sequence of musical notes, chosen from among the notes in the scale, and an output is generated responsive to the sequence, in which the qualitatively distinct sounds are produced responsive to the respective notes in the sequence at respective musical pitches associated with the respective notes.

Abstract: A method comprising a computational procedure for obtaining capacitances for three-dimensional geometries which include multiple regions with different dielectric constants. The methodology is not limited to uniform dielectrics. The dielectric regions can also consist of non-uniform and/or anisotropic materials.

Abstract: A method comprising a computational procedure for obtaining reduced-order models of partial element equivalent circuit (PEEC) models of very large scale integrated (VLSI) interconnects. The methodology is not limited to PEEC applications, and can be used for generating reduced-order models of other systems which can be modeled with linear, time-invariant systems of ordinary differential equations with time delays.

Abstract: An optical disk device applicable to a plurality of optical disks differently normalized from each other, including rotation driving unit which support the optical disk and which drive rotation of the optical disk; a plurality of optical heads which are applicable to the a plurality of differently normalized optical disks, respectively; single guiding member for guiding each of the a plurality of optical heads in a radial direction of the optical disk supported by the rotation driving unit; pushing member for pushing the each of the a plurality of optical heads along the single guiding member; container unit for containing all of the a plurality of optical heads; and optical head moving member for moving one of the a plurality of optical heads from the container unit toward the single guiding member or from the single guiding member toward the container unit.

Abstract: A nonvolatile semiconductor memory device includes a memory cell array and a check memory cell array. Each check memory cell is connected to a cell block including a plurality of memory cells and has about the same characteristic as the memory cell. A predetermined value is written to the check memory cell each time data is written to the corresponding cell block. By comparing a value stored in the check memory element to the predetermined value, the deterioration state of the memory cells is detected.

Abstract: A first pump collects used slurry which is employed for a CMP technique. A new slurry supply device supplies new slurry having a concentration higher than a concentration of the used slurry, to the used slurry. A sensor measures a concentration of recycled slurry produced by mixing the used slurry with the new slurry. The new slurry supply device stops supplying the new slurry, in a case where the concentration which the sensor measures is equal to or above a predetermined value. A second pump supplies recycled slurry onto a polishing stage, after the used slurry is completely recycled.

Abstract: In a connection part of vertical transfer registers with respect to a horizontal transfer register, transfer electrodes to which clocks &phgr;V1, &phgr;V2A, &phgr;V3A, &phgr;V2B, &phgr;V3B, and &phgr;V1A are applied are arranged in the cited order. In a horizontal transfer register 6, transfer is conducted by 3-phase clocks &phgr;H1A, ØH1B, and &phgr;H2. By activating clocks, signal charges of a channel denoted by A-A′ and channels equivalent thereto are first transferred to undersides of electrodes of &phgr;H1A of the horizontal transfer register. The signal charges are transferred in the rightward direction to underside of electrodes of &phgr;H1B. Subsequently, signal charges of a channel denoted by B-B′ and channels equivalent thereto are transferred to undersides of electrodes of &phgr;H1B of the horizontal transfer register, and mixed with the signal charges previously transferred.

Abstract: In an optical receiver, a photodiode converts an optical digital input signal to an electrical signal which is fed into a differential amplifier to produce a pair of true and complementary output signals. The true output signal is received by a peak detector and the output of this peak detector is summed in a first adder with the complementary output of the differential amplifier. The true output of the amplifier is summed in a second adder with a predetermined constant voltage. Difference between the output signals of the first and second adders is detected and compared with a decision threshold to produce an output signal at one of two logical levels depending on whether the difference is higher or lower than the decision threshold. Preferably, a second peak detector having a substantially similar operating characteristic to that of the first peak detector is connected between the source of the predetermined constant voltage and the second adder.

Abstract: Search of video images in a database is enhanced by specification of at least one object and a background in stored frames and in queries of the database. Video information is stored in the database by means of representative frames that include at least one object and a background. A query of the database is executed by determining whether a representative frame in the database having at least one object and a background is similar to a search image having at least one object and a background.

Abstract: A semiconductor light emitting device has a stacked structure including an n-type clad layer, an active layer, and a p-type clad layer on an InP substrate. The p-type clad layer is made from an MgZnSeTe-based compound semiconductor lattice-matched with InP. The n-type clad layer is made from a compound semiconductor lattice-matched with InP and selected from an MgZnSeTe-based compound semiconductor, an MgZnCdSe-based compound semiconductor, and an MgCdSSe-based compound semiconductor.

Abstract: A variable phase shifting circuit includes a resistance unit and a variable capacitance unit. The resistance unit includes at least one resistor element. The resistance unit input a first signal and a second signal and also output a third signal and a fourth signal. The variable capacitance unit includes two base-to-emitter capacitors of two transistors. The variable capacitance unit is connected to the third signal and the fourth signal. The two base-to-emitter capacitors is varied by controlling collector currents of the two transistors. The third signal and the fourth signal are produced by shifting phases of the first and second signals based on the at least one resistor element and the two base-to-emitter capacitors.

Abstract: A semiconductor device is provided with a semiconductor substrate and five electrode pads disposed on the semiconductor substrate. Four of the electrode pads form a rectangle, and the remaining one electrode pad is disposed on the substantial center of the rectangle. The semiconductor device is also provided with a plurality of semiconductor elements disposed between the electrode pads. The semiconductor elements are connected to any of the five electrode pads and used for measuring characteristics.