Abstract: A method and system for protecting user data during power failures on a network-computer-class data processing system is provided. The network-computer-class data processing system is integrated with a power supply having an early power fail warning signal to ensure that unsaved changes to user data files are saved before a complete power failure strikes the data processing system. As a user employs one or more applications to create or modify data files, a table of file changes is created for each user data file that is opened by the user. This table is kept in non-volatile media, preferably on the user's network computer but possibly on a server located on a network connected to the network computer if the network computer lacks non-volatile memory. The entire contents of the table are saved to non-volatile storage in the time interval between the early power fail warning signal going active and the power completely failing.

Abstract: A method of writing data onto magnetic thin film media commonly employed in magnetic disk drives at sub-ambient temperatures is disclosed. The method employs a thin film capacitor having a magnetoelectric element as its dielectric in a GMR read/write head to produce magnetic fields. To get the maximum magnetic field from the thin film capacitor, the thin-film capacitor is cooled via a thermoelectric cooling device present in the GMR read/write head of the magnetic disk drive. The magnetic field produced by the thermoelectrically cooled thin film capacitor structure is capable of writing data onto magnetic media with increased bit densities or coercivity.

Abstract: A method, system and apparatus is provided to perform noise analysis of electrical circuits. The method and system partitions an original multi-port circuit to a reduced circuit model having a specific layout configuration. The reduced circuit model may have a variety of configurations. Then an input signal is applied to a first port of the reduced circuit model using the specific layout configuration and an output signal is measured from a second port of the reduced circuit model. The process continues until all input ports which may contribute noise to the circuit are measured and then the results are calculated to determine the total output of simulated noise experienced by the circuit. The calculated output results of the reduced circuit model are then used to determine whether the original circuit is designed to withstand the quantity of noise experienced by the reduced circuit model.

Abstract: A method and apparatus for reporting a posted speed limit to the driver of a vehicle is disclosed. The position of the vehicle is determined using a GPS receiver or triangulation of cellular telephone signals. The position is used to retrieve speed limit or other information from a database. The information is then reported to the driver. A technique is also disclosed for comparing the actual speed of the vehicle with the posted speed limit and issuing a warning to the driver when the posted speed limit is exceeded.

Abstract: A method of transferring data between devices in a computer system. In a preferred embodiment, a requesting device broadcasts a request for data to other devices in the computer system. The computer system identifies, from a plurality of responding devices within the computer system, a target device that contains the data. In response to a determination that the target device does not support higher-performance transactions, the computer system disables higher-performance transactions and transfers the data to the requesting device via a lower-performance transaction process.

Abstract: This invention reduces pessimism in cross talk analysis of digital circuits by combining only the peak noises from aggressor nets that can switch simultaneously during the time interval when the downstream receiving latch can sample the errant data. This is done by, first, determining aggressor switching windows and victim sensitivity windows. These windows are then used to determine which combination of noise sources can temporally align so as to cause the greatest noise within the victim sensitivity window.

Abstract: A method and system for compensating for instrumentation overhead in trace data is provided. To profile a program, the program is executed to generate trace records that are written to a trace file. A set of event trace records in a trace file is processed to determine one or more trace overhead compensation values. The trace overhead compensation values are determined by computing, for each successive pair of event trace records in the trace file, a difference between a first timestamp in a preceding event trace record and a second timestamp in a succeeding event trace record. The minimum value of all of these differences is then stored as a trace overhead compensation value representing an amount of time for instrumentation processing of an event. The one or more trace overhead compensation values are applied to the event trace records during subsequent processing of the set of event trace records.

Abstract: A process and system for optimizing an invocation of a method is provided. A determination is made to compile a calling method, and a call to a callee method is detected within the first method. The callee method may be a non-final, virtual method, and a determination may be made that the callee method has not been previously overridden. The callee method is then inlined within the first method. In addition, no conditional statements are inserted into the calling method along with the inlined method. The determination to compile and optimize these methods may be made by a just-in-time compiler, and if the methods are Java methods, then a Java just-in-time compiler performs the optimization process. If a determination is made to load a class that contains a method that overrides the callee method, then the calling method is recompiled or patched.

Abstract: A method and apparatus for synthesizing logic circuits with synchronized outputs is disclosed. A logic designer selects a fixed number of levels in which to synthesize the circuit, each level implementing a plurality of different logic function all having the same propagation delay. Circuit outputs are synchronized by ensuring that each logic function is synthesized by connecting logic functions from level to level such that each signal path passes through each level once and only once.

Abstract: A method and apparatus for sending messages to a digital pager in a communications system. A voice message is received from a caller, wherein the voice message is to be sent to a pager. The voice message is transformed into a text message, wherein the message is transformed using a data processing system. The text message is sent to the digital pager across an air interface.

Abstract: A method for transferring data between devices in a computer system. In a preferred embodiment, a requesting device broadcasts a request for data. Each of a plurality of devices within the computer system responds to the request and indicates the location of the device and whether the device contains the requested data. The data is then transferred to the requesting device from one of the devices containing the data within the plurality of devices to the requesting device. The device selected to transfer the data to the requesting device has the closest logical proximity to the requesting device which results in a quick transfer of data.

Abstract: A method in a data processing system for managing memory within the data processing system. A discardable page that is to be removed from the memory is identified. A determination is made as to whether performance will increase by storing the discardable page in a paging device located within the data processing system. If it is determined that performance will increase, the discardable page is marked as a paged discardable page and stored in the paging device locally, wherein this page may be retrieved from the paging device. The paging device may take the form of a paging file, such as a swap file. If space is unavailable within the paging device, the discardable page may be discarded. These processes may be implemented in a network computer.

Abstract: A method for wrap detection in a microprocessor system, the system including a plurality of rename buffers. The method includes performing a two's complement subtraction of a completion pointer from a target pointer, wherein a carry out results from the subtraction. The method further includes comparing the carryout and a virtual bit associated with a location to produce a result. The result is compared to the most significant bit of the target pointer and if there is a match between the most significant bit of the second pointer and the result, an indication is made that the instruction may issue. A system for utilizing the above method of wrap detection includes a means for performing a two's complement subtraction of a completion pointer from a target pointer, wherein a carry out results from the two's complement subtraction.

Abstract: A distributed system structure contains an address switch, multiple memory subsystems, and multiple master devices, either processors, I/O agents, or coherent memory adapters, organized into a set of nodes supported by a node controller. The address switch connects to each of the node controllers and to each of the memory subsystems, and each of the memory subsystems connects to the address switch and to each of the node controllers. The node controller receives commands from a master device. The buses between the master devices, the node controllers, the address switch, and the memory subsystems are operable using a variety of bus protocols. A response combination block connects to the address switch, to each master device, to each node controller, and to each memory subsystem in order to receive, logically combine/generate, and then transmit command status signals and command response signals associated with commands issued by master devices.

Abstract: A method and system for debugging the execution of an instruction within an instruction pipeline is provided. A processor in a data processing system contains instruction pipeline units. An instruction may be tagged, and in response to an instruction pipeline unit completing its processing of the tagged instruction, a stage completion signal is asserted. An execution monitor external to the pipelined processor monitors the stage completion signals during the execution of the tagged instruction. The execution monitor may be a logic analyzer that displays the stage completion signals in real-time on a display device of the execution monitor. An instruction to be tagged may be selected based upon an instruction selection rule, such as the address of the instruction.

Abstract: A method and system for an approximation of a filter function for computing a characteristic value of an output pixel based on characteristic values of a plurality of input pixels is provided. A filter response curve adjustment value is obtained, preferably from a lookup table, based on a distance interval between coordinates of the output pixel and coordinates of a selected input pixel. A normalized filter response curve input value is computed based on the distance interval and the filter response curve adjustment value, preferably by adding the values together. The characteristic values at a plurality of input pixels are obtained. A linearly interpolated value for the characteristic value of the output pixel is then computed based on the characteristic values of the plurality of input pixels and the normalized filter response curve input value.

Abstract: A method and apparatus for executing a method. A bytecode invoking a method is detected. A method block is located associated with the method, wherein the method block includes an identification of an invoker. The invoker is called, wherein the invoker performs setup for execution of the method. The setup performed by the invoker is tailored specifically to the method. A completion of the method is detected and returns control to the invoker, wherein the invoker completes processing of the method.

Abstract: A method in a computer for handling a network partition of a clustered computer system, wherein the computer is part of a number of computers located within the cluster. Data is periodically written into a data structure in a shared resource, wherein the data provides a status of the computer and wherein a data structure is associated with each cluster node. Monitoring for a partition of the cluster is performed. All data structures located in the shared resource are read in response to detecting a network partition of the cluster. A determination is made as to whether the computer is in the preferred partition, one containing the largest number of computers or is otherwise determined to be viable for continued operation. Should the computer determine that it is not a member of a preferred or otherwise viable partition, it must relinquish access to shared cluster resources requiring mutually exclusive access, such as a database on a shared disk volume.

Abstract: Persistent network connections created by the inventive mechanism survive logoff and persist across logon. A persistent connection is created when a network connection is established (or when an existing connection is modified) using a simple command line or GUI interface. Information supplied via the interface enables the mechanism to establish, dynamically, a different security context for each given persistent connection, and this security context is “flexible” in that it may differ from the user's logon id and password. If a user were currently authenticated for a given persistent network connection before a network failure, the user, upon connect, is allowed access to the network connection without requiring further authentication.

Abstract: A method and apparatus for executing bytecodes. Bytecodes are received for execution and a determination is made as to whether the bytecodes should be compiled. The bytecodes are sent to a just in time compiler responsive to a determination that the method should be compiled. The bytecodes form a method, and the method is sent to an interpreter, responsive to an absence of a determination that the method should be compiled.