Abstract: Provided is a semiconductor memory device and method that can control internal supply voltages independently. The semiconductor memory device includes a memory cell array, a reference voltage generating unit, an internal reference voltage generating unit, and an internal supply voltage generating unit. The reference voltage generating unit outputs a reference voltage in response to an external voltage. The internal reference voltage generating unit converts the reference voltage into a plurality of internal reference voltages, and outputs the plurality of internal reference voltages. The internal supply voltage generating unit converts the plurality of internal reference voltages into a plurality of internal supply voltages, and outputs the plurality of internal supply voltages. A first internal reference voltage is used to generate a first internal supply voltage and a second internal reference voltage is used to generate a second internal supply voltage.

Abstract: In a non-volatile memory device allowing multi-bit and/or multi-level operations, and methods of operating and fabricating the same, the non-volatile memory device comprises, in one embodiment: a semiconductor substrate, doped with impurities of a first conductivity type, which has one or more fins defined by at least two separate trenches formed in the substrate, the fins extending along the substrate in a first direction; pairs of gate electrodes formed as spacers at sidewalls of the fins, wherein the gate electrodes are insulated from the semiconductor substrate including the fins and extend parallel to the fins; storage nodes between the gate electrodes and the fins, and insulated from the gate electrodes and the semiconductor substrate; source regions and drain regions, which are doped with impurities of a second conductivity type, and are separately formed at least at surface portions of the fins and extend across the first direction of the fins; and channel regions corresponding to the respective gate

Abstract: Provided are a device and method for detecting and analyzing radiation. A detection unit includes a detector, and generates signal pulses from photons of the radiation. Each signal pulse has an amplitude that is determined by an interaction of the photons at a depth of the detector. A pulse deficit correction trigger corrects for charge deficits that occur from the photon interaction across the depth of the detector by removing depth dependence in the amplitudes of the signal pulses. A multi-channel analyzer receives the signal pulses and generates a spectrum from the received signal pulses, and receives a trigger signal that is generated by the pulse deficit correction trigger to remove the depth dependence in the amplitudes of the signal pulses.

Abstract: A system and method for summarizing the contents of a natural language document provided in electronic or digital form includes preformatting the document, performing linguistic analysis, weighting each sentence in the document as a function of quantitative importance, and generating one or more document summaries, from a plurality of selectable document summary types, as a function of the sentence weights.

Abstract: In a semiconductor device for protecting an electrostatic discharge and a method of fabricating the same, a gate electrode is disposed on a semiconductor substrate of first conductivity type, and a heavily doped region and a vertical lightly doped region surround the heavily doped region. The heavily doped region and vertical lightly doped region have a second conductivity type and are disposed in the semiconductor substrate on both sides of the gate electrode. The vertical lightly doped region has a lower impurity concentration and a larger depth than the heavily doped regions. A horizontal lightly doped region, which has a lower impurity concentration than the vertical lightly doped region, is further disposed in an upper side of the vertical lightly doped region.