Patents Represented by Attorney Milton D. Martlett
  • Patent number: 4016643
    Abstract: A high-frequency, high-power FET constructed upon a planar substrate with a repeated pattern of gate, source, and drain connections wherein any two are connected with metallization layers adjacent to and separated from the semiconductor substrate. The third element is interconnected with an overlay metallization layer separated from the lower two metallization layers by an insulating dielectric. The overlay layer is preferably grounded for minimum feedback capacitance.
    Type: Grant
    Filed: April 12, 1976
    Date of Patent: April 12, 1977
    Assignee: Raytheon Company
    Inventors: Robert A. Pucel, James A. Benjamin