Abstract: A semiconductor integrated circuit evaluation system for evaluating, at high speed, functions of a device under test and a test pattern for testing the device under test without using an actual tester or designed device.
Type:
Grant
Filed:
October 23, 1998
Date of Patent:
May 9, 2000
Assignee:
Advantest Corp.
Inventors:
Koji Takahashi, Hiroaki Yamoto, Hidenobu Matsumura