Patents Represented by Attorney N. Kenneth Burraston
  • Patent number: 7699616
    Abstract: An apparatus including a substrate having a plurality of through holes and a plurality of cables, including wires and/or coaxial cables, extending through respective ones of the plurality of through holes of the substrate. Each of the cables comprises a conductor and terminates about a surface of the substrate such that the conductors of respective ones of plurality of cables are planarly aligned and available for electrical contact. A system including a cable interface extending through respective ones of a plurality of through holes of a body of the interface; an interconnection component comprising a first plurality of contact points aligned with respective ones of conductors of the plurality of cables and a second plurality of contact points aligned to corresponding contact points of a device to be tested. Also, a method of routing signals through the conductors of the plurality of cables between electronic components.
    Type: Grant
    Filed: February 20, 2008
    Date of Patent: April 20, 2010
    Assignee: FormFactor, Inc.
    Inventors: Charles A. Miller, Benjamin N. Eldridge
  • Patent number: 7692433
    Abstract: A composite substrate for testing semiconductor devices is formed by selecting a plurality of substantially identical individual substrates, cutting a corner from at least some of the individual substrates in accordance with their position in a final array configuration, and then assembling the individual substrates into the final array configuration. The final array configuration of substrates with corners cut or sawed away conforms more closely to the surface area of a wafer being tested, and can easily fit within space limits of a test environment.
    Type: Grant
    Filed: June 16, 2006
    Date of Patent: April 6, 2010
    Assignee: FormFactor, Inc.
    Inventors: Benjamin N. Eldridge, Roy J. Henson, Eric D. Hobbs, Peter B. Mathews, Makarand S. Shinde
  • Patent number: 7694246
    Abstract: A semiconductor wafer is cut to singulate integrated circuit dice formed on the wafer. A die pick machine then positions and orients the singulated dice on a carrier base such that signal, power and ground pads formed on the surface of each die reside at predetermined positions relative to landmarks on the carrier base the die pick machine optically identifies. With the dice temporarily held in place on the carrier base, they are subjected to a series of testing and other processing steps. Since each die's signal pads reside in predetermined locations, they can be accessed by appropriately arranged probes providing test equipment with signal access to the pads during tests. After each test, a die pick machine may replace any die that fails the test with another die, thereby improving efficiency of subsequent testing and other processing resources.
    Type: Grant
    Filed: June 19, 2002
    Date of Patent: April 6, 2010
    Assignee: FormFactor, Inc.
    Inventors: Charles A. Miller, Timothy E. Cooper, Yoshikazu Hatsukano
  • Patent number: 7688090
    Abstract: Techniques for performing wafer-level burn-in and test of semiconductor devices include a test substrate having active electronic components such as ASICs mounted to an interconnection substrate or incorporated therein, metallic spring contact elements effecting interconnections between the ASICs and a plurality of devices-under-test (DUTs) on a wafer-under-test (WUT), all disposed in a vacuum vessel so that the ASICs can be operated at temperatures independent from and significantly lower than the burn-in temperature of the DUTs. The spring contact elements may be mounted to either the DUTs or to the ASICs, and may fan out to relax tolerance constraints on aligning and interconnecting the ASICs and the DUTs.
    Type: Grant
    Filed: March 18, 2008
    Date of Patent: March 30, 2010
    Assignee: FormFactor, Inc.
    Inventors: Igor Y. Khandros, David V. Pedersen
  • Patent number: 7688085
    Abstract: In some embodiments of the invention, a probing apparatus can comprise a substrate, a spring structure attached to the substrate, and a plurality of resilient probes attached to the spring structure. Each probe can comprise a contact portion disposed to contact a device. The spring structure can provide a first source of compliance for each of the probes in response to forces on the contact portions of the probes, and each of the probes can individually provide second sources of compliance in response to the forces on the contact portions of the probes.
    Type: Grant
    Filed: June 13, 2006
    Date of Patent: March 30, 2010
    Assignee: FormFactor, Inc.
    Inventor: John K. Gritters
  • Patent number: 7688063
    Abstract: A thermal adjustment apparatus for adjusting one or more thermally induced movements of an electro-mechanical assembly includes: a compensating element expanding at a first rate different from a second rate at which the electro-mechanical assembly expands for generating a counteracting force in response to changes in temperature; and a coupling mechanism coupling the compensating element to the electro-mechanical assembly, and being adjustable to control an amount of the counteracting force applied to the electro-mechanical assembly as temperature changes.
    Type: Grant
    Filed: June 30, 2008
    Date of Patent: March 30, 2010
    Assignee: FormFactor, Inc.
    Inventors: Andrew W. McFarland, Kevin Youl Yasumura, Eric D. Hobbs, Keith J. Breinlinger
  • Patent number: 7681309
    Abstract: A method is disclosed that can be used to interconnect an integrated circuit (IC) multiple die assembly to conductors on a substrate such that signals can be conveyed between the dies and the conductors on the substrate. The multiple die assembly can include a first IC die and at least one secondary IC die, which can be mounted on a surface of the first IC die. Signal paths can be provided between the first IC die and the secondary IC die. The method can include providing conductive contacts on the surface of the first IC die. Each such conductive contact can have a free end extending outward from the surface beyond the secondary IC die. The method can also include mounting the multiple die assembly on the substrate such that the free end of each contact is brought into contact with the conductors on the substrate. The secondary IC die can reside between the surface of the first IC die and the substrate, and the contacts can convey signals between the first IC die and the conductors on the substrate.
    Type: Grant
    Filed: March 25, 2005
    Date of Patent: March 23, 2010
    Assignee: FormFactor, Inc.
    Inventor: Charles A. Miller
  • Patent number: 7683738
    Abstract: A transmission line includes a signal conductor and at least one varactor diode capacitively coupled to the signal conductor. The transmission line's signal path delay is a function of its shunt capacitance, and the varactor's capacitance forms a part of the transmission line's shunt capacitance. The transmission line's signal path delay is adjusted by adjusting a control voltage across the varactor diode thereby to adjust the varactor diode's capacitance.
    Type: Grant
    Filed: July 3, 2007
    Date of Patent: March 23, 2010
    Assignee: FormFactor, Inc.
    Inventor: Charles A. Miller
  • Patent number: 7675311
    Abstract: One or more testers wirelessly communicate with one or more test stations. The wireless communication may include transmission of test commands and/or test vectors to a test station, resulting in testing of one or more electronic devices at the test station. The wireless communication may also include transmission of test results to a tester. Messages may also be wirelessly exchanged.
    Type: Grant
    Filed: May 15, 2007
    Date of Patent: March 9, 2010
    Assignee: FormFactor, Inc.
    Inventors: Igor Y. Khandros, Benjamin N. Eldridge, Charles A. Miller, A. Nicholas Sporck
  • Patent number: 7675299
    Abstract: According to some embodiments, a method of determining a resistance of probes on a contactor device is disclosed. The contactor device can include a plurality of probes disposed to contact an electronic device to be tested. The method can include electrically connecting a pair of the probes to each other, and then forcing one of a voltage onto or a current through the pair of the probes. At a location on the contactor device, the other of a voltage across or a current through the pair of the probes can be sensed. A determination relating to a resistance of the probes can be determined from the values of the forced voltage or current and sensed other of the voltage or current.
    Type: Grant
    Filed: March 3, 2009
    Date of Patent: March 9, 2010
    Assignee: FormFactor, Inc.
    Inventor: Frederick J. Lane
  • Patent number: 7674112
    Abstract: Embodiments of resilient contact elements and methods for fabricating same are provided herein. In one embodiment, a resilient contact element for use in a probe card includes a lithographically formed resilient beam having a first end and an opposing second end; and a tip disposed proximate the first end of the beam and configured to break through an oxide layer of a surface of a device to be tested to establish a reliable electrical connection therewith; wherein at least a central portion of the beam has a continuous sloped profile defining, in a relaxed state, a height measured between the beam and a plane representing an upper surface of a device to be tested that is greater near the second end of the beam than near the first end of the beam.
    Type: Grant
    Filed: December 28, 2006
    Date of Patent: March 9, 2010
    Assignee: FormFactor, Inc.
    Inventors: John K. Gritters, Benjamin N. Eldridge, Keith J. Breinlinger
  • Patent number: 7675301
    Abstract: An electronic component is disclosed, having a plurality of microelectronic spring contacts mounted to a planar face of the component. Each of the microelectronic spring contacts has a contoured beam, which may be formed of an integral layer of resilient material deposited over a contoured sacrificial substrate, and comprises a base mounted to the planar face of the component, a beam connected to the base at a first end of the beam, and a tip positioned at a free end of the beam opposite to the base. The beam has an unsupported span between its free end and its base. The microelectronic spring contacts are advantageously formed by depositing a resilient material over a molded, sacrificial substrate. The spring contacts may be provided with various innovative contoured shapes. In various embodiments of the invention, the electronic component comprises a semiconductor die, a semiconductor wafer, a LGA socket, an interposer, or a test head assembly.
    Type: Grant
    Filed: July 17, 2007
    Date of Patent: March 9, 2010
    Assignee: FormFactor, Inc.
    Inventors: Benjamin N. Eldridge, Stuart W. Wenzel
  • Patent number: 7658831
    Abstract: Systems and methods for depositing a plurality of droplets in a three-dimensional array are disclosed. The array can comprise a first type of droplets disposed to form a support structure and a second type of droplets forming a conductive seed layer on the support structure. A structure material can be electrodeposited onto the seed layer to create a three-dimensional structure.
    Type: Grant
    Filed: December 21, 2005
    Date of Patent: February 9, 2010
    Assignee: FormFactor, Inc
    Inventors: Gaetan L. Mathieu, Treliant Fang, Eric D. Hobbs
  • Patent number: 7659736
    Abstract: A wafer test assembly includes multiple probe head substrates arranged like tiles with connectors attached to one side and probes supported on the opposing side. In one embodiment, flexible cable connectors directly connect the connectors on the probe head tile to a test head, while in another embodiment the flexible cables connect the probe head tile to a PCB providing horizontal routing to test head connectors. In one embodiment, leveling pins provide a simplified support structure connecting to a retaining element attached to the tiles to provide for applying a push-pull leveling force. A test head connector interface frame enables rearrangement of connectors between the test head and the probe card to provide for both full wafer contact or partial wafer contact. The test head connectors are rearranged by being slidable on rails, or pluggable and unpluggable enabling movement over a range of positions.
    Type: Grant
    Filed: June 12, 2007
    Date of Patent: February 9, 2010
    Assignee: FormFactor, Inc.
    Inventors: Benjamin N. Eldridge, Barbara Vasquez, Makarand S. Shinde, Gaetan L. Mathieu, A. Nicholas Sporck
  • Patent number: 7649368
    Abstract: Double-sided interposer assemblies and methods for forming and using them. In one example of the invention, an interposer comprises a substrate having a first surface and a second surface opposite of said first surface, a first plurality of contact elements disposed on said first side of said substrate, and a second plurality of contact elements disposed on said second surface of said substrate, wherein said interposer connects electronic devices via said first and said second plurality of contact elements.
    Type: Grant
    Filed: July 8, 2008
    Date of Patent: January 19, 2010
    Assignee: FormFactor, Inc.
    Inventors: Benjamin N. Eldridge, Carl V. Reynolds
  • Patent number: 7649366
    Abstract: A contactor device comprising a plurality of probes disposed to contact ones of the electronic devices can be electrically connected to a source of test signals. A switch can be activated electrically connecting a connection to the source of test signals to a selected one of a first group of electrically connected ones of the probes disposed to contact a first set of a plurality of the electronic devices or a second group of electrically connected ones of the probes disposed to contact a second set of a plurality of the electronic devices.
    Type: Grant
    Filed: September 1, 2006
    Date of Patent: January 19, 2010
    Assignee: FormFactor, Inc.
    Inventors: Roy J. Henson, A. Nicholas Sporck
  • Patent number: 7642794
    Abstract: The present invention discloses a method and system compensating for thermally induced motion of probe cards used in testing die on a wafer. A probe card incorporating temperature control devices to maintain a uniform temperature throughout the thickness of the probe card is disclosed. A probe card incorporating bi-material stiffening elements which respond to changes in temperature in such a way as to counteract thermally induced motion of the probe card is disclosed including rolling elements, slots and lubrication. Various means for allowing radial expansion of a probe card to prevent thermally induced motion of the probe card are also disclosed. A method for detecting thermally induced movement of the probe card and moving the wafer to compensate is also disclosed.
    Type: Grant
    Filed: December 21, 2007
    Date of Patent: January 5, 2010
    Assignee: FormFactor, Inc.
    Inventors: Benjamin N. Eldridge, Gary W. Grube, Ken S. Matsubayashi, Richard A. Larder, Makarand S. Shinde, Gaetan L. Mathieu
  • Patent number: 7634849
    Abstract: An electronics module is assembled by demountably attaching integrated circuits to a module substrate. The module is then tested at a particular operating speed. If the module fails to operate correctly at the tested speed, the integrated circuit or circuits that caused the failure are removed and replaced with new integrated circuits, and the module is retested. Once it is determined that the module operates correctly at the tested speed, the module may be rated to operate at the tested speed and sold, or the module may be tested at a higher speed.
    Type: Grant
    Filed: April 17, 2007
    Date of Patent: December 22, 2009
    Assignee: FormFactor, Inc.
    Inventor: Benjamin N. Eldridge
  • Patent number: 7628620
    Abstract: Embodiments of reinforced resilient elements and methods for fabricating same are provided herein. In one embodiment, a reinforced resilient element includes a resilient element configured to electrically probe an unpackaged semiconductor device to be tested, the resilient element having a first end and an opposing second end; and a reinforcement member having a first end affixed to the resilient element at the first end thereof or at a point disposed between the first and the second ends of the resilient element, an opposing second end disposed in a direction towards the second end of the resilient element, and a resilient portion disposed between the first and second ends, wherein the resilient portion is not affixed to the resilient element.
    Type: Grant
    Filed: June 9, 2008
    Date of Patent: December 8, 2009
    Assignee: FormFactor, Inc.
    Inventor: John K. Gritters
  • Patent number: 7622935
    Abstract: A probe card assembly can comprise a probe head assembly and a wiring substrate. The probe head assembly can comprise a plurality of probes disposed to contact an electronic device disposed on a holder in a test housing. The wiring substrate can include an electrical interface to a test controller and a plurality of electrical wiring composing electrical paths between the electrical interface and ones of the probes, and the wiring substrate can comprise a first portion on which the electrical interface is disposed and a second portion composing the probe head assembly. The second portion of the wiring substrate can be moveable with respect to the first portion of the wiring substrate.
    Type: Grant
    Filed: October 20, 2006
    Date of Patent: November 24, 2009
    Assignee: FormFactor, Inc.
    Inventors: Eric D. Hobbs, Alexander H. Slocum, Benjamin N. Eldridge, Keith J. Breinlinger, Shawn Powell