Patents Represented by Attorney, Agent or Law Firm Neil Steinberg
  • Patent number: 7436084
    Abstract: The object of one aspect of the invention is to develop a method by means of which the erection of wind power installations can be effected even more advantageously but in particular also more quickly. A further aim of one aspect of the invention is to provide in particular a solution which is suitable for offshore wind power installations.
    Type: Grant
    Filed: February 2, 2004
    Date of Patent: October 14, 2008
    Inventor: Aloys Wobben
  • Patent number: 7436706
    Abstract: There are many inventions described herein as well as many aspects and embodiments of those inventions, for example, circuitry and techniques for reading, writing and/or operating a semiconductor memory cells of a memory cell array, including electrically floating body transistors in which an electrical charge is stored in the body of the transistor. In one aspect, the present inventions are directed to one or more independently controllable parameters of a memory operation (for example, restore, write, refresh), to program or write a data state into a memory cell. In one embodiment, the parameter is the amount of time of programming or writing a predetermined data state into a memory cell. In another embodiment, the controllable parameter is the amplitude of the voltage of the control signals applied to the gate, drain region and/or source region during programming or writing a predetermined data state into a memory cell. Indeed, the controllable parameters may be both temporal and voltage amplitude.
    Type: Grant
    Filed: October 31, 2006
    Date of Patent: October 14, 2008
    Inventors: Gregory Allan Popoff, Paul de Champs, Hamid Daghighian
  • Patent number: 7365446
    Abstract: The invention relates to a method for constructing a wind energy plant and to a wind energy plant as such. An aim of one aspect of the invention is to provide a method for constructing wind energy plants at lower expenses and more rapidly. According to one aspect, a method for constructing a wind energy plant that comprises a tower that is based on a foundation and an electrical power module, the power module is mounted on the tower foundation before the tower itself is constructed. The power module comprises a transformer and optionally an inverter or other electrical installations, such as for example switch cabinets, that are provided for controlling the wind energy plant and/or for guiding the electrical power that is provided by the generator of the wind energy plant and that is fed to a network.
    Type: Grant
    Filed: September 12, 2002
    Date of Patent: April 29, 2008
    Inventor: Aloys Wobben
  • Patent number: 7359229
    Abstract: There are many inventions described and illustrated herein. In a first aspect, the present invention is directed to a memory device and technique of reading data from and writing data into memory cells of the memory device. In this regard, in one embodiment of this aspect of the invention, the memory device and technique for operating that device that minimizes, reduces and/or eliminates the debilitating affects of the charge pumping phenomenon. This embodiment of the present invention employs control signals that minimize, reduce and/or eliminate transitions of the amplitudes and/or polarities. In another embodiment, the present invention is a semiconductor memory device including a memory array comprising a plurality of semiconductor dynamic random access memory cells arranged in a matrix of rows and columns.
    Type: Grant
    Filed: March 2, 2007
    Date of Patent: April 15, 2008
    Assignee: Innovative Silicon S.A.
    Inventors: Richard Ferrant, Serguei Okhonin, Eric Carman, Michel Bron
  • Patent number: 7355916
    Abstract: There are many inventions disclosed herein. In one aspect, the present inventions are directed to methods and circuitry to control, adjust, determine and/or modify the absolute and/or relative positioning or location (i.e., absolute or relative amount) of reference current which is employed by sensing circuitry to sense the data state of a memory cell during a read operation of one or more memory cells. The control, adjustment, determination and/or modification of the reference current levels may be implemented using many different, distinct and/or diverse techniques and circuitry, including both analog and digital techniques and circuitry.
    Type: Grant
    Filed: September 5, 2006
    Date of Patent: April 8, 2008
    Assignee: Innovative Silicon S.A.
    Inventor: Philippe Bauser
  • Patent number: 7347667
    Abstract: This relates to a wind power installation comprising a pylon (tower) and a rotor arranged on the pylon and having at least one individually adjustable rotor blade. The wind power installation further comprises a device to detect the wind direction, a device to detect the azimuthal position and/or a device to detect the deviation from vertical of the pylon (tower). In one embodiment, a control unit is coupled to the rotor blade to adjust an angle of incidence of the at least one adjustable rotor blade using information which is representative of (i) the wind direction, (ii) the azimuthal position of the rotor, and (iii) the deviation from vertical of the pylon. The rotor blade may be adjusted in dependence on a deviation between the ascertained wind direction and the detected azimuthal position.
    Type: Grant
    Filed: February 24, 2005
    Date of Patent: March 25, 2008
    Inventor: Aloys Wobben
  • Patent number: 7342842
    Abstract: A data storage device such as a DRAM memory having a plurality of data storage cells 10 is disclosed. Each data storage cell 10 has a physical parameter which varies with time and represents one of two binary logic states. A selection circuit 16, writing circuits 18 and a refreshing circuit 22 apply input signals to the data storage cells to reverse the variation of the physical parameter with time of at least those cells representing one of the binary logic states by causing a different variation in the physical parameter of cells in one of said states than in the other.
    Type: Grant
    Filed: January 5, 2007
    Date of Patent: March 11, 2008
    Assignee: Innovative Silicon, S.A.
    Inventors: Pierre Fazan, Serguei Okhonin
  • Patent number: 7335934
    Abstract: There are many inventions described and illustrated herein. In a first aspect, the present invention is directed to integrated circuit device including SOI logic transistors and SOI memory transistors, and method for fabricating such a device. In one embodiment, integrated circuit device includes memory portion having, for example, PD or FD SOI memory cells, and logic portion having, for example, high performance transistors, such as Fin-FET, multiple gate transistors, and/or non-high performance transistors (such as single gate transistors that do not possess the performance characteristics of the high performance transistors).
    Type: Grant
    Filed: July 2, 2004
    Date of Patent: February 26, 2008
    Assignee: Innovative Silicon S.A.
    Inventor: Pierre Fazan
  • Patent number: 7333552
    Abstract: A method and a device for the coding and/or decoding of an information symbol for transmission over a transmission channel or a received signal value is described and illustrated, whereby a channel symbol used for coding is selected from at least two available channel symbols by means of a pre-calculated expected received signal value. The pre-calculation is achieved, based on the echo properties of the transmission channel and transmission values already sent. A pre-coding method with low receiver-side calculation requirement is thus prepared, whereby the information symbol can be transmitted by means of various channel symbols and thus various transmission values can also be transmitted. The possible selections may be used for minimization of the transmission energy and/or to achieve a minimal disturbance or even a constructive effect through the inter-symbol interference occurring on transmission.
    Type: Grant
    Filed: September 4, 2001
    Date of Patent: February 19, 2008
    Assignee: Nanotron Technologies GmbH
    Inventors: Manfred Koslar, Rainer Hach
  • Patent number: 7321805
    Abstract: A production managing system for semiconductor devices includes, in a semiconductor producing center C, production devices 11a-11c for producing semiconductor devices, in-line measuring devices 12a-12c for measuring data of a lot, a database 2 storing data of production methods, the measured data, the specifications of the process steps corresponding to the measured data, the estimated yield, the data of lot input date and hour, the data of the scheduled date on which the process step is performed, the data of actual date of completion in every step and the data of the scheduled date of completion of the semiconductor devices of every lot, correspondingly to a lot number data of the semiconductor devices (chips) and a server 1 including an estimated yield operating unit 1a for calculating the estimated yield, which is a final yield, on the basis of the specifications and the measured data, and a production managing unit 1b for performing a production management of semiconductor devices ordered by a user on th
    Type: Grant
    Filed: December 6, 2004
    Date of Patent: January 22, 2008
    Assignee: Fab Solutions, Inc.
    Inventors: Keizo Yamada, Yousuke Itagaki, Takeo Ushiki, Tohru Tsujide
  • Patent number: 7301803
    Abstract: A method and a device for the coding and decoding of an information symbol for transmission over a transmission channel or a received signal value is described and illustrated, whereby a channel symbol used for coding is selected from at least two available channel symbols by means of a pre-calculated expected received signal value. The pre-calculation is achieved, based on the echo properties of the transmission channel and transmission values already sent. A pre-coding method with low receiver-side calculation requirement is thus prepared, whereby the information symbol can be transmitted by means of various channel symbols and thus various transmission values can also be transmitted. The possible selections may be used for minimization of the transmission energy and/or to achieve a minimal disturbance or even a constructive effect through the inter-symbol interference occurring on transmission.
    Type: Grant
    Filed: December 15, 2005
    Date of Patent: November 27, 2007
    Assignee: Innovative Silicon S.A.
    Inventors: Serguei Okhonin, Mikhail Nagoga
  • Patent number: 7301838
    Abstract: A technique of, and circuitry for sampling, sensing, reading and/or determining the data state of a memory cell of a memory cell array (for example, a memory cell array having a plurality of memory cells which consist of an electrically floating body transistor). In one embodiment, sense amplifier circuitry is relatively compact and pitched to the array of memory cells such that a row of data may be read, sampled and/or sensed during a read operation. In this regard, an entire row of memory cells may be accessed and read during one operation which, relative to at least architecture employing multiplexer circuitry, may minimize, enhance and/or improve read latency and read access time, memory cell disturbance and/or simplify the control of the sense amplifier circuitry and access thereof. The sense amplifier circuitry may include write back circuitry to modify or “re-store” the data read, sampled and/or sensed during a read operation and/or a refresh operation in the context of a DRAM array.
    Type: Grant
    Filed: December 12, 2005
    Date of Patent: November 27, 2007
    Assignee: Innovative Silicon S.A.
    Inventors: William Kenneth Waller, Eric Carman
  • Patent number: 7280399
    Abstract: A semiconductor device, such as a memory device or radiation detector, is disclosed, in which data storage cells are formed on a substrate. Each of the data storage cells includes a field effect transistor having a source, drain, and gate, and a body arranged between the source and drain for storing electrical charge generated in the body. The magnitude of the net electrical charge in the body can be adjusted by input signals applied to the transistor, and the adjustment of the net electrical charge by the input signals can be at least partially cancelled by applying electrical voltage signals between the gate and the drain and between the source and the drain.
    Type: Grant
    Filed: August 11, 2005
    Date of Patent: October 9, 2007
    Assignee: Innovative Silicon S.A.
    Inventors: Pierre Fazan, Serguei Okhonin
  • Patent number: 7271567
    Abstract: There are many inventions described and illustrated herein. In one aspect, the present invention is directed to a portable fuel cell power and management system (for example, hydrogen and/or methanol based systems), components and/or elements thereof, as well as techniques for controlling and/or operating such systems. The fuel cell power management system (and method of controlling and/or operating same) actively monitors, manages and/or controls one or more operating parameter(s) of the fuel cell system. For example, the system monitors, manages and/or controls the consumption and/or the rate of consumption of fuel by the system, and in response thereto, may provide and/or alert the user to amount of fuel remaining, consumed, the rate of consumption and/or the time (or estimation thereof) remaining until all of the fuel is spent. In this way, the user may schedule or plan accordingly.
    Type: Grant
    Filed: August 11, 2005
    Date of Patent: September 18, 2007
    Assignee: Jadoo Power Systems, Inc.
    Inventors: Glenn M. Dunn, Paul Getchel, Duncan D. MacGregor, Sinclair D. MacGregor, Kenneth E. Pearson
  • Patent number: 7251164
    Abstract: An integrated circuit device comprising a memory cell array including a plurality of memory cells wherein each memory cell includes at least one electrically floating body transistor having source, drain and a body regions, wherein the body region is electrically floating and disposed between the source and drain regions; a gate is disposed over the body region. Each memory cell includes a first data state representative of a first charge in the body region and a second data state representative of a second charge in the body region. The integrated circuit device further includes operating characteristics adjustment circuitry, coupled to the memory cell array, to adjust one or more operating or response characteristics of one or more memory cells to improve the uniformity of operation/response characteristics of the memory cells of the memory cell array relative to the other memory cells of the array.
    Type: Grant
    Filed: October 11, 2005
    Date of Patent: July 31, 2007
    Assignee: Innovative Silicon S.A.
    Inventors: Serguei Okhonin, Mikhail Nagoga
  • Patent number: 7241523
    Abstract: A portable electricity generation device comprises a plurality of fuel cells, each fuel cell having an anode end with a catalyst facilitating the separation of hydrogen atoms into electrons and protons, a cathode end facilitating the combination of the electrons and protons into water molecules in the presence of oxygen, and a current bearing portion providing a current path for the electrons to traverse. The electricity generation device also includes a fuel storage container for storing a supply of hydrogen and delivering the supply of hydrogen to an anode end of the plurality of fuel cells so as to initiate a flow of the electrons through the current bearing portion. In addition, the portable electricity generation device includes an air moving device configured to direct atmospheric air toward a cathode end of the plurality of fuel cells, wherein the air moving device is positioned to convectively cool the plurality of fuel cells as it supplies atmospheric air to the cathode end.
    Type: Grant
    Filed: December 24, 2002
    Date of Patent: July 10, 2007
    Assignee: Jadoo Power Systems, Inc.
    Inventors: Muralidharan P. Arikara, Lawrence R. Bawden, Jr., Kenneth E. Pearson, Glenn M. Dunn
  • Patent number: 7239549
    Abstract: A semiconductor device, such as a memory device or radiation detector, is disclosed, in which data storage cells are formed on a substrate. Each of the data storage cells includes a field effect transistor having a source, drain, and gate, and a body arranged between the source and drain for storing electrical charge generated in the body. The magnitude of the net electrical charge in the body can be adjusted by input signals applied to the transistor, and the adjustment of the net electrical charge by the input signals can be at least partially cancelled by applying electrical voltage signals between the gate and the drain and between the source and the drain.
    Type: Grant
    Filed: May 19, 2005
    Date of Patent: July 3, 2007
    Assignee: Innovative Silicon S.A.
    Inventors: Pierre Fazan, Serguei Okhonin
  • Patent number: 7236812
    Abstract: There are many inventions described and illustrated herein. In one aspect, the present invention is a system, a device and a method for sensing the concentration of an analyte in a fluid (for example, a fluid sample) or matrix. The analyte may be glucose or other chemical of interest. The fluid or matrix may be, for example, the fluid or matrix in the body of an animal (for example, human), or any other suitable fluid or matrix in which it is desired to know the concentration of an analyte. In one embodiment, the invention is a system and/or device that includes one or more layers having a plurality of analyte-equivalents and mobile or fixed receptor molecules with specific binding sites for the analyte-equivalents and analytes under analysis (for example, glucose). The receptor molecules, when exposed to or in the presence of analyte (that resides, for example, in a fluid in an animal), bind with the analyte (or vice versa).
    Type: Grant
    Filed: August 27, 2004
    Date of Patent: June 26, 2007
    Assignee: BioTex, Inc.
    Inventors: Ralph Ballerstadt, Roger McNichols, Ashok Gowda
  • Patent number: 7232994
    Abstract: The present invention provides a standard test device used for testing a hole of a semiconductor device. The standard test device has a structure which comprises: at least a dummy film on a base surface; at least an insulating layer which has at least one opening penetrating through the insulating layer, so that a part of a top surface of the at least dummy film is shown through the at least one opening, wherein the at least dummy film has a predetermined constant thickness at least around the at least one opening. The standard test device makes it easily possible to determine or measure a thickness of a residual film on a bottom of the contact hole.
    Type: Grant
    Filed: August 5, 2005
    Date of Patent: June 19, 2007
    Assignee: Fab Solutions, Inc.
    Inventor: Keizo Yamada
  • Patent number: 7233874
    Abstract: In one aspect, the present invention is a sensor unit for sensing process parameters of a process to manufacture an integrated circuit using integrated circuit processing equipment. In one embodiment, the sensor unit includes a substrate having a wafer-shaped profile and a first sensor, disposed on or in the substrate, to sample a first process parameter. The sensor unit of this embodiment also includes a second sensor, disposed on or in the substrate, to sample a second process parameter wherein the second process parameter is different from the first process parameter. In one embodiment, the sensor unit includes a first source, disposed on or in the substrate, wherein first source generates an interrogation signal and wherein the first sensor uses the interrogation signal from the first source to sample the first process parameter.
    Type: Grant
    Filed: January 24, 2005
    Date of Patent: June 19, 2007
    Assignee: Brion Technologies, Inc.
    Inventors: Jun Ye, Xun Chen