Abstract: The composition of an exhaust gas stream from an internal combustion engine is analyzed using an infrared sensor detecting infrared radiation from a catalyst passing the exhaust gas. The infrared sensor provides signals indicating the presence of certain gases. These signals can be used to generate an engine control strategy to adjust the composition of the exhaust gas.
Abstract: In semiconductor integrated circuits, piezoresistance is recognized as a factor affecting production yield and circuit performance. Current flow in a circuit resistor is aligned with one of the <100> family of equivalent directions. When current is flowing along such a direction the change in resistance due to any combination of stress components is at a minimum. Additionally, variation of resistance due to stress and strain may be reduced by an increase of the total impurity concentration in a resistor.
Type:
Grant
Filed:
December 27, 1974
Date of Patent:
June 22, 1976
Assignee:
Bell Telephone Laboratories, Incorporated
Abstract: A method of making an oxide isolated integrated circuit structure is simplified by forming a first level metallization pattern without the conventional underlying insulating layer and without the need for restricting the size of the metallization to the size of the semiconductor regions to be contacted. Portions of the first level metallization pattern can extend on the oxide isolation region to contact two otherwise isolated semiconductor zones. Additionally, subsequent to the formation of the oxide isolation regions and the first level metallization, an intermediate dielectric masking pattern is formed so the combination of the first level metallization, the oxide isolation regions and the masking pattern defines zones for the introduction of impurities. Further, the masking pattern alone is used to provide contact holes for a subsequently formed second level metallization pattern.
Type:
Grant
Filed:
December 23, 1974
Date of Patent:
June 15, 1976
Assignee:
Bell Telephone Laboratories, Incorporated
Inventors:
Roger Edwards, William Joshua Evans, Wesley Norman Grant, Bernard Thomas Murphy
Abstract: A logic gate circuit includes a resistance divider input to the base of an input transistor and a multiple emitter output transistor in an emitter follower configuration. The circuit has favorable switching speed and power dissipation characteristics and reduces the effect of both capacitive loading and series resistance in signal interconnections. An efficient layout of one such logic circuit has intercell wiring channels formed across the circuit and has the inputs and outputs of the circuit arranged in two lines each of which crosses perpendicular to the wiring channels.
Type:
Grant
Filed:
August 14, 1974
Date of Patent:
June 8, 1976
Assignee:
Bell Telephone Laboratories, Incorporated
Abstract: A logic gate circuit includes parallel drive of an output transistor and an inverter transistor by an input transistor. The inverter transistor then drives an active pull-up transistor which improves switching speed. The parallel drive of the invention allows the use of the active pull-up transistor without requiring a change in circuit voltage levels.
Type:
Grant
Filed:
September 23, 1974
Date of Patent:
January 20, 1976
Assignee:
Bell Telephone Laboratories, Incorporated