Patents Represented by Attorney, Agent or Law Firm Paul M. Anderson
  • Patent number: 6513103
    Abstract: A method and apparatus for adjusting the performance of a memory system is provided. A memory system comprises a master device and a slave device. A memory channel couples the master device to the slave device such that the slave device receives the system operating information from the master device via the memory channel. The slave device further includes means for tuning circuitry within the slave device such that the performance of the memory system is improved.
    Type: Grant
    Filed: October 10, 1997
    Date of Patent: January 28, 2003
    Assignee: Rambus Inc.
    Inventors: Bruno Werner Garlepp, Pak Shing Chau, Kevin S. Donnelly, Clemenz Portmann, Donald C. Stark, Stefanos Sidiropoulos, Richard M. Barth, Paul G. Davis, Ely K. Tsern
  • Patent number: 6470405
    Abstract: A system and method for performing data transfers within a computer system is provided. The system includes a controller configured to dynamically adjust the interleave of the communications required to perform a series of data transfer operations to maximize utilization of the channel over which the communications are to be performed. The controller is able to vary the time interval between the transmission of control information that requests a data transfer and the performance of the data transfer by signaling the beginning of the data transfer with a strobe signal sent separate from the control information. The controller is able to defer the determination of how much data will be transferred in the operation by initiating the termination of a data transfer with a termination signal. The method provides a technique for distinguishing between identical control signals that are carried on the same line.
    Type: Grant
    Filed: May 29, 2001
    Date of Patent: October 22, 2002
    Assignee: Rambus Inc.
    Inventors: Richard Maurice Barth, Frederick Abbot Ware, John Bradly Dillon, Donald Charles Stark, Craig Edward Hampel, Matthew Murdy Griffin
  • Patent number: 6426916
    Abstract: A synchronous memory device and methods of operation and controlling such a device. The method of controlling the memory device includes providing a value which is representative of a number of cycles of an external clock signal to transpire after which the memory device responds to a read request. The method further includes providing block size information to the memory device, wherein the block size information defines an amount of data to be output by the memory device in response to a read request. The method further includes receiving the amount of data, after the number of clock cycles of the external clock signal transpire.
    Type: Grant
    Filed: February 27, 2001
    Date of Patent: July 30, 2002
    Assignee: Rambus Inc.
    Inventors: Michael Farmwald, Mark Horowitz