Abstract: A method for method for inhibiting thermal run-away in a multi-phase power converter at varying load transition rates. A multi-phase power converter having an on-time is provided and the frequency of the multi-phase power converter is adjusted so that a load step period and the on time of the multi-phase power converter are in a temporal relationship. Alternatively, a load step rate is inhibited from locking onto a phase current of the multi-phase power converter by suspending an oscillator signal. In accordance with another alternative, a load step rate is inhibited from locking onto a phase current of the multi-phase power converter by suspending an oscillator signal and dithering an input signal to the oscillator.

Abstract: An integrated power semiconductor device has an isolation structure having two or more isolation trenches, and one or more regions in between the isolation trenches, and a bias arrangement coupled to the regions to divide a voltage across the isolation structure between the isolation trenches. By dividing the voltage, the reverse breakdown voltage characteristics such as voltage level, reliability and stability can be improved for a given area of device, or for a given complexity of device, and avalanche breakdown at weaknesses in isolation structures can be reduced or avoided.

Abstract: A method and circuit for changing a threshold voltage of a transistor. The circuit includes a sense circuit coupled to a switching transistor, a circuit transistor and to one terminal of a resistor. The other terminal of the resistor is connected to a body contact. The switching transistor directs current along one of two different paths in response to an input voltage sensed by the sense circuit. When the switching transistor directs a first current along one path, the first current is steered towards the resistor and flows through the resistor in one direction and when the switching transistor directs a second current along the other path, the second current is directed towards the resistor and flows through the resistor in the opposite direction from the first current. Steering the currents varies the potential of a body with respect to the potential at the source of the circuit transistor.

Abstract: A monitoring system (14, 24, 34, 50) monitors voltage of a stack of batteries (10, 20, 30.) Each battery has a plurality of cells (13). A monitoring unit (14, 24, 34) is associated with each battery and measures voltage across a selected cell. A first monitoring unit and a second monitoring unit measure the same cell, e.g. cell Cn,1 of battery 10. The first and second measurements are used to calculate a correction factor which can be used to correct a set of measurements made by one of the monitoring units (14, 24). The monitoring units (14, 24, 34) are arranged in a chain, with adjacent units in the chain being connected by a communication interface in which data is transmitted as signaling voltage levels between interface units. The interface units (16, 25) of a pair of monitoring units (14, 24) use the same signaling voltage levels.

Abstract: A current protection circuit that uses a sequence of bipolar transistors to provide or draw current from a protected circuit node. An initial bipolar transistor has its emitter terminal coupled to the protected circuit node, with its collector terminal coupled to a current source or sink. One or more additional intermediary bipolar transistors are also provided in the sequence. Each additional intermediary bipolar transistor has its emitter terminal coupled to the base terminal of the previous bipolar transistor in the sequence, and has its collector terminal coupled to the current source or sink. To complete the sequence, a reverse-biased diode is coupled between the base terminal of the final intermediary bipolar transistor and the current source or sink. This allows for effective triggering of current protection for a protected circuit node without requiring a zener diode.

Abstract: A semiconductor component that includes an integrated passive device and method for manufacturing the semiconductor component. Vertically integrated passive devices are manufactured above a substrate. In accordance with one embodiment, a resistor is manufactured in a first level above a substrate, a capacitor is manufactured in a second level that is vertically above the first level, and a copper inductor is manufactured in a third level that is vertically above the second level. The capacitor has aluminum plates. In accordance with another embodiment, a resistor is manufactured in a first level above a substrate, a copper inductor is manufactured in a second level that is vertically above the first level, and a capacitor is manufactured in a third level that is vertically above the second level. The capacitor may have aluminum plates or a portion of the copper inductor may serve as one of its plates.

Abstract: A method and circuit for managing thermal performance of an integrated circuit. Temperature sensing circuits and a plurality of power FETs that are coupled together in parallel are manufactured from a semiconductor substrate. Each temperature sensing circuit monitors the temperature of the portion of the semiconductor substrate near or including a corresponding power FET. When the temperature of the semiconductor substrate near one or more of the power FETs reaches a predetermined value, the corresponding temperature sensing circuit reduces a voltage appearing on the gate of the power FET. The reduced voltage increases the on-resistance of the power FET and channels a portion of its current to others of the plurality of power FETs. The power FET continues operating but with a reduced current flow. When the temperature of the semiconductor substrate falls below the predetermined value, the gate voltage of the power FET is increased to its nominal value.

Abstract: A DC-DC converter and method for compensating for errors in the DC-DC converter. The DC-DC converter includes an inductor coupled for receiving a source of operating voltage through a plurality of switches. The switches are controlled by a control circuit that has first and second circuit paths that are substantially parallel to each other. Each circuit path is comprised of two switched capacitor comparators that are connected in series. The circuit paths function such that during one portion of a clock period one of the circuit paths operates in an error correction mode and the other circuit path operates in a normal mode. During a different portion of the clock period the operational modes of the circuit paths switch. This allows for a calibration interval in a sampled system in which at least one circuit path is always active and responsive to the input signals in a desired manner.

Abstract: A circuit and a method for nullifying temperature dependence of a circuit characteristic. The circuit includes a plurality of transistors configured such that they generate a gate voltage that includes a threshold voltage as a component. The gate voltage is applied to a transistor to generate a current that is proportional to a process transconductance parameter. The current is applied to a comparator having a differential pair of transistors, wherein each transistor has a process transconductance parameter. The circuit takes the ratios of the process transconductance parameter associated with the current to that of each transistor of the differential pair. By rationing the process transconductance parameters, temperature dependence is nullified or negated. The ratios can be used to set the hysteresis voltage of the comparator.

Abstract: A Schottky diode capable of sustaining a breakdown voltage of greater than about 250 volts and a method for its manufacture. An epitaxial layer disposed on a semiconductor substrate has a thickness of at least about 15 micrometers and an impurity concentration ranging from about 1×1014 atoms per cubic centimeter to about 1×1015 atoms per cubic centimeter. A guard ring extends from about 3 micrometers to about 15 micrometers into the epitaxial layer. A dielectric material is formed over the epitaxial layer and a portion of the dielectric material is removed to expose a portion of the guard ring and a portion of the epitaxial layer within the guard ring. An electrically conductive material is formed over the exposed portion of the epitaxial layer and an electrically conductive material is formed in contact with a bottom surface of the semiconductor substrate.

Abstract: A thyristor and a method for manufacturing the thyristor that includes providing a semiconductor substrate that has first and second major surfaces. A first doped region is formed in the semiconductor substrate, wherein the first doped extends from the first major surface into the semiconductor substrate. The first doped region has a vertical boundary that has a notched portion. A second doped region is formed in first doped region, wherein the second doped region extends from the first major surface into the first doped region. A third doped region is formed in the semiconductor substrate, wherein the third doped region extends from the second major surface into the semiconductor substrate.

Abstract: A modular starting gate having a truss module, a door releasing module, a stall divider module, a front door module, a rear door module, a towing module, and a wheel assembly module. The door releasing module includes a roll-bar having articulated members that are coupled to the front door module via a coupling bar and a turnbuckle adjuster. The roll-bar is coupled to the truss module via a bearing and includes a first section coupled to a second section via a U-joint. A rebound stop is coupled to the starting gate, wherein the rebound stop has a first portion mounted to the front door module which cooperates with a second portion coupled to the stall divider module.

Abstract: A method and apparatus for location determination of a mobile station (304) in a fixed radiocommunication system having at least one base station (302) reduces the computational load on the mobile station. Satellite ephemeris information and clock correction information are received at a base station and periodically used to calculate satellite position data. The satellite position data are conveyed to the mobile station. At other times, the satellite ephemeris data is used to calculate curve fit data at the base station. The curve fit data is transmitted to the mobile station, reducing the amount of data conveyed over the communication link and the computation load on the mobile station.

Abstract: An optoelectronic device (10) having an overfill material (30) that protects components of the optoelectronic device (10) and a method for assembling the optoelectronic device (10). The optoelectronic device (10) includes a support structure (16) on which an optoelectronic device (12) is mounted. In addition, the optoelectronic device includes a fiber ferrule (13) through which an optical fiber (39) extends. The optoelectronic device (12) and the optical fiber (14) are coated with an overfill material (30).

Abstract: A low-noise wide band preamplifier (10) provides an output voltage signal (V.sub.O) corresponding to the variation in resistance of a sensor such as Magneto-resistive (MR) head (4) which is used to read the data stored on a magnetic media. In this preamplifier, a transistor (12) and resistor (13) combination is used to function as a transimpedance amplifier (11) to increase the frequency bandwidth of the preamplifier and reduce the noise. The transimpedance amplifier (11) takes its input from an input transistor (3) coupled between the MR head (4) and a current source (2). A biasing circuit formed by a transconductance amplifier (12) and a capacitor (5) is used to control the input transistor (3) so that the average current passing through the input transistor (3) matches the current provided by the current source (2).

Abstract: A half-bridge driver provides a current limit on the low-side driver (20) and a current limit on the high-side driver (16). The current limits are initially set equal. If the low-side driver current limits, then a modulation current from the low-side driver increases the high-side driver current limit threshold to maintain stable operation of the control circuits. In addition, the present invention provides dual conduction paths to charge the main conduction transistor of the low-side driver, while detecting current limit. When current limit is detected, the charging current to the main conduction transistor is switched to current limit mode.

Abstract: A graded-channel semiconductor device (10) is formed in a pedestal (12). The pedestal (12) is formed on a substrate (11) and improves the electrical characteristics of the device (10) compared to conventional device structures. The pedestal (12) has sides (13) that are bordered by a first dielectric layer (24) to provide electrical isolation. An interconnect structure (90) can be optionally formed in conjunction with the formation of the device (10). The interconnect structure (90) has a plurality of conductors (60,97) that can be used to transport electrical signals across the device (10).

Abstract: A digital horizontal flyback control circuit for controlling the horizontal position of a video signal on a monitor screen receives a horizontal drive signal (21) and a flyback signal (22) generated when a video display beam is caused to move from the end of one line of the display to the beginning of a next line by an edge of a pulse of the horizontal drive signal, the flyback pulse being delayed with respect to the horizontal drive signal pulse by a flyback delay period. A measuring circuit (15) measures the flyback delay period and a subtractor circuit (17) subtracts the flyback delay from a set horizontal position (18) representing a desired delay between the flyback pulse and a reference pulse (11). A comparator (19) compares the subtraction value with the value of a clock counter (23) whose count value is reset by the reference pulse (11) and produces a set signal at an output when the subtraction value and the clock count value are the same so as to generate the horizontal drive signal pulse (21).

Abstract: A clock generation circuit for a digital video processing apparatus which has a simple structure and can be stably worked in both luminance and color signal systems. A color burst phase error signal indicative of phase difference of a color burst signal is produced on the basis of two color difference signals, a sampling clock signal is generated in accordance with the color burst phase error signal, the sampling clock is divided in order to produce a chrominance subcarrier signal, and the phase of the chrominance subcarrier signal is adjusted in accordance with the color burst phase error signal.

Abstract: A microprocessor has RAS and CAS outputs for exclusive coupling, via a bus, to RAS and CAS inputs of a private DRAM. The microprocessor has a DRAM Control Register having at least one bit which is set to designate whether the DRAM is private to the microprocessor, a read circuit which reads the one bit and determines whether the bit is set, and a control logic circuit coupled to the read circuit for controlling functions of the microprocessor according to whether the DRAM is private to it.