Abstract: A field effect transistor is fabricated with a window pad layer that is patterned using a patterned dielectric with sublithographic spacing as an etch mask. Desirable attributes of the transistor include small junction capacitance.
Type:
Grant
Filed:
December 1, 1993
Date of Patent:
April 18, 1995
Assignee:
AT&T Corp.
Inventors:
Kuo-Hua Lee, Chun-Ting Liu, Ruichen Liu
Abstract: Dispersion compensation is achieved in an optical communications system by using an optical circulator with first, second, and third ports. The first and third ports are connected to system optical fibers. The second port is connected to a dispersion compensating fiber and return means. The signal passes through the dispersion compensating fiber twice permitting shorter dispersion compensating fibers to be used than were previously used. A Faraday rotator may be used compensate for the polarization mode dispersion of the fiber.
Abstract: Solder bumps are electrodeposited onto a substrate with carefully controlled heights by forming patterned conductors on an substrate, depositing and patterning a layer of material, such as titanium that is easily oxidized, and electrodepositing the solder bumps. The solder does not deposit on the titanium. Solder bumps of uniform height are obtained because the titanium layer acts as part of the electrical circuit during electrodeposition.
Abstract: Shallow junctions n- and p-channel field effect transistors are formed with a single ion implant into a conformal tungsten silicide layer. Although phosphorous and boron are implanted into the same silicide regions, the phosphorous prevents the boron from outdiffusing.
Type:
Grant
Filed:
December 1, 1993
Date of Patent:
March 7, 1995
Assignee:
AT&T Corp.
Inventors:
Kuo-Hua Lee, Chun-Ting Liu, Ruichen Liu
Abstract: An amplifier is described which has a two stage arrangement in which the second stage is pumped with the pump signal not used in the first stage.
Abstract: A method for semiconductor device fabrication that uses a mixture of SiCl.sub.4, CF.sub.4, O.sub.2, and He to selectively etch GaAs with respect to AlGaAs. Etch selectivities greater than 300:1 are obtained.
Abstract: A piezoelectric actuator is used to control the relative positions of a laser and optical fiber during laser welding of components to a base.
Abstract: A transmitter suitable for ISDN use feeds the 2B1Q transmit signals directly into a sigma-delta modulator. The input word is two or three bits and the datapath within the sigma-delta modulator need be only six bits wide. The sigma-delta modulator has sample-hold means which has some filtering effect. The additional filtering requirements are met with an analog filter. No digital interpolation filter is required.
Abstract: Contamination of LPCVDBP TEOS films is reduced by preventing volatile compounds, resulting from reactions of the residue in the outlet of the furnace from reaching the deposition portion of the furnace where they would otherwise react with the deposition gases to produce chemically generated particles which contaminate the dielectric film.
Type:
Grant
Filed:
December 29, 1989
Date of Patent:
July 12, 1994
Assignee:
AT&T Bell Laboratories
Inventors:
Ajit S. Manocha, Virendra V. S. Rana, James F. Roberts, Ankineedu Velaga
Abstract: Pattern transfer from a resist to an underlying layer is accomplished by etching the underlying layer in a plasma comprising hydrogen bromide and oxygen. Accuracy of pattern transfer is obtained by using first and second materials underneath the resist. The first and second materials may be, e.g., polysilicon and a photoresist. Etching of the resist is performed under conditions designed to minimize changes in the horizontal dimensions.
Type:
Grant
Filed:
December 30, 1992
Date of Patent:
July 5, 1994
Assignee:
AT&T Bell Laboratories
Inventors:
Taeho Kook, Avinoam Kornblit, Kolawole R. Olasupo
Abstract: A thin film transistor is formed by depositing amorphous silicon and forming a gate structure and then using a high-pressure oxidation to form a high-quality gate oxide that has a layered structure.
Abstract: High etch selectivity of both silicon nitride and silicon with respect to silicon oxide is obtained using an etch bath of phosphoric acid, hydrofluoric acid, and nitric acid. Minimal loading effects are observed and a long bath life is obtained by replenishing the hydroflouric and nitric acids.
Abstract: A polyimide layer used in manufacturing semiconductor integrated circuits is etched in a plasma comprising O.sub.2, Ar, and CHF.sub.3. The plasma produces excellent critical dimension control and yields good resist to polyimide etching selectivity.
Abstract: A method of making a silicided inverse T-gate with an L-shaped silicon spacer and nitride sidewall spacers is described. The L-shaped spacer is electrically connected to the gate.
Abstract: A network is described which has a Manhattan Street architecture that is implemented using a token ring system, such as the fiber distributed data interface, with the primary and secondary rings representing vertical and horizontal lines, respectively.
Abstract: A layer of spin-on-glass is used as a hard mask for patterning an underlying layer of polysilicon. The patterned polysilicon may be used in the gate structures of field effect transistors.
Abstract: Monolithic optically bistable modulator arrays, such as an M.times.N array of S-SEEDs, are electrically addressed with a matrix of electrical row and column contacts. Connected to the center node of each S-SEED is an addressing means having elements, such as diodes, transistors, or capacitors, which are electrically enabled and disabled.
Type:
Grant
Filed:
December 27, 1991
Date of Patent:
August 3, 1993
Assignee:
AT&T Bell Laboratories
Inventors:
Leo M. F. Chirovsky, Anthony L. Lentine, David A. B. Miller
Abstract: A method is described which reduces the size of the constraint graph used in assembling cells into a tiled module for integrated circuit manufacture. The smaller size significantly reduces the amount of time required to assemble the cells appropriately.