Abstract: There is disclosed a switch matrix and operational method relying upon a high degree of operational logic at each matrix crosspoint. In one embodiment, the switch is used in a multiprocessor system arranged as an image and graphics processor. The processor is structured with several individual processors all having communication links to several memories without restriction. The switch matrix serves to establish the processor memory links and the entire image processor, including the individual processors, the crossbar switch and the memories and is contained on a single silicon substrate.

Abstract: A single-instruction multiple-data processor (10) has an input layer especially designed for high data input and output rates. The processor (10) has a number of processing elements (20), each corresponding to incoming data samples. The processing elements (20) are interleaved so that a set of samples can be input in parallel. The processor (10) is programmable, which makes it especially useful for digital filtering. Near-neighbor communications (41) among processing elements (20) realize the delays required for horizontal filtering.