Patents Represented by Attorney, Agent or Law Firm Richard M. Ludwin, Esq.
  • Patent number: 6832367
    Abstract: A method for recording and replaying execution of distributed programs on a computer system in a distributed environment, includes identifying an execution order of critical events of a program, generating groups of critical events of the program, wherein for each group, critical events belonging to the group belong to a common execution thread, and generating for each execution thread a logical thread schedule that identifies a sequence of the groups so as to allow deterministically replaying a non-deterministic arrival of stream socket connection requests, a non-deterministic number of bytes received during message reads, and a non-deterministic binding of stream sockets to local ports.
    Type: Grant
    Filed: March 6, 2000
    Date of Patent: December 14, 2004
    Assignee: International Business Machines Corporation
    Inventors: Jong-Deok Choi, Ravi Konuru, Harini Srinivasan
  • Patent number: 6820258
    Abstract: A system and method for dynamically optimizing a code sequence of a program while executing in a computer system comprises: identifying one or more program yield points in an original code sequence at which a run-time representation of the original code sequence may be optimized in an executing program; generating a prologue of instructions for setting up program state associated with the original code sequence at a particular yield point; adding the prologue of instructions to an intermediate representation of the original code sequence code for generating a specialized code sequence; and, compiling the specialized code sequence with a compiler for generating a run-time representation of the specialized code sequence, the run-time representation being further optimized for execution on a target computer system.
    Type: Grant
    Filed: August 28, 2000
    Date of Patent: November 16, 2004
    Assignee: International Business Machines Corporation
    Inventors: Stephen J. Fink, Mark Wegman
  • Patent number: 6817013
    Abstract: An optimization method and apparatus for converting source code for a program written in a programming language into machine language. The program includes a basic block as a unit to estimate an execution time for the program to be processed, generating a nested tree that represents the connections of the basic blocks using a nesting structure, when a conditional branch is accompanied by a node in the nested tree, employing the execution time estimated by using the basic blocks as units to obtain an execution time at the node of the program when a conditional branching portion of a program is directly executed and when the conditional branching portion is executed in parallel, and defining the node as a parallel execution area group when the execution time required for the parallel execution is shorter or dividing multiple child nodes of the nodes into multiple parallel execution areas.
    Type: Grant
    Filed: October 4, 2001
    Date of Patent: November 9, 2004
    Assignee: International Business Machines Corporation
    Inventors: Kunio Tabata, Hideaki Komatsu
  • Patent number: 6816175
    Abstract: The present invention relates to means and a method executable by a computer system for navigation within a tree structure with leaf nodes representing arbitrary types of objects, i.e. of related data treated as a unit. According to the current teaching a travel point representation step is suggested, wherein after selection of at least one non-leaf node as travel point only the path and non-leaf nodes in said tree structure from said travel point to the root of said tree structure is represented in a tree view area. Moreover the complete sub-tree of said travel point is represented in said tree view area. In addition or alternatively after selection of said travel point, a travel box is represented for said travel point, said travel box representing object identifications of all objects of all leaf nodes in said sub tree of said travel point.
    Type: Grant
    Filed: September 15, 1999
    Date of Patent: November 9, 2004
    Assignee: International Business Machines Corporation
    Inventors: Birgit Hamp, Adrian Mueller, Frank Neumann, Annette Opalka, Roland Seiffert
  • Patent number: 6785275
    Abstract: A routing table for use with a router in a world-wide network, includes an existing routing table with a multicast-destination (MD) column.
    Type: Grant
    Filed: March 13, 2000
    Date of Patent: August 31, 2004
    Assignee: International Business Machines Corporation
    Inventors: Richard Harold Boivie, Kiyoshi Maruyama
  • Patent number: 6756651
    Abstract: A novel photodetector CMOS-compatible photodetector is disclosed in which photo-generation of carriers (electrons) is carried out in the metal of the electrodes, rather than as electron-hole pairs in the semiconductor on which the metal electrodes are deposited. The novel photo detector comprises a silicon or other semiconductor substrate material characterized by an electron energy bandgap, and a pair of metal electrodes disposed upon a surface of the silicon to define therebetween a border area of the surface. One of the two electrodes being exposed to the incident radiation and covering an area of said surface which is larger than the aforesaid border area, the aforesaid metal of the electrodes being characterized by a Fermi level which is within said electron energy bandgap.
    Type: Grant
    Filed: September 26, 2001
    Date of Patent: June 29, 2004
    Assignee: International Business Machines Corporation
    Inventors: Ferenc M. Bozso, Fenton Read McFeely, John Jacob Yurkas
  • Patent number: 6757679
    Abstract: An electronic queue management system for implementation on a chip. The queue management system comprises a plurality of primitive queue elements each including a register for a next-pointer and a register for a queue number. The next-pointer values may be selected via a register input and can be fed out via a registered output. Such queue elements are associated with a respective entry in a central array which stores the data belonging to the actual request. The separation of the data array and queue elements facilitates queue management as the data amounts are quite large compared to the small amount of data being required for the pre logic of the queue management system. Multiple add requests and multiple remove requests operations for different queue elements may be concurrently achieved in a single cycle.
    Type: Grant
    Filed: May 11, 2000
    Date of Patent: June 29, 2004
    Assignee: International Business Machines Corporation
    Inventor: Rolf Fritz
  • Patent number: 6757294
    Abstract: A method (and system) of creating a multicast packet by a source node in a world-wide network, includes providing each multicast packet with a predetermined indicator indicating that the packet includes a multicast packet, one of a plurality of multicast destinations being placed in a packet destination field and a list of remaining multicast destinations being provided in a packet header. A conventional router receiving a multicast packet handles it as a unicast packet and routes it in a conventional manner. A multicast-capable router receiving a multicast packet goes through a packet regeneration and routing process, creating multicast packets and/or unicast packets and then routing them using the conventional routing table.
    Type: Grant
    Filed: March 13, 2000
    Date of Patent: June 29, 2004
    Assignee: International Business Machines Corporation
    Inventor: Kiyoshi Maruyama
  • Patent number: 6754761
    Abstract: A method of (and system for) of transporting a sideband signal through a physical layer of an extended bridge, includes on a first node of the extended bridge, providing an interface to a sideband component coupled to a side of the extended bridge, encoding a first data stream being output from the sideband component with a unique header to identify the data output from the sideband component, and multiplexing the first data stream from the sideband component with a second data stream from a principal signal port, and outputting the multiplexed first and second data streams to another node of the extended bridge.
    Type: Grant
    Filed: August 7, 2000
    Date of Patent: June 22, 2004
    Assignee: International Business Machines Corporation
    Inventors: Sameh W. Asaad, Kevin W. Warren
  • Patent number: 6720602
    Abstract: A semiconductor device and a method for forming the semiconductor device, include forming a mandrel, forming spacer wordline conductors on sidewalls of the mandrel, separating, by using a trim mask, adjacent spacer wordline conductors, and providing a contact area to contact alternating ones of pairs of the spacer wordline conductors.
    Type: Grant
    Filed: March 21, 2002
    Date of Patent: April 13, 2004
    Assignee: International Business Machines Corporation
    Inventors: Lawrence A. Clevenger, Louis Lu-Chen Hsu, Jack A. Mandelman, Carl D. Radens
  • Patent number: 6710346
    Abstract: A presence detector includes an optical emitter for emitting optical radiation, an optical detector for detecting a presence of an object based on receiving the optical radiation, and a microcontroller for controlling the optical emitter and processing the optical detector output, such that a range adjustment and range hysteresis based on the object are provided by software in the microcontroller.
    Type: Grant
    Filed: August 2, 2001
    Date of Patent: March 23, 2004
    Assignee: International Business Machines Corporation
    Inventors: James Gabriel Brewington, James Lewis Levine, Duane Scott Miller, Michael Alan Schappert
  • Patent number: 6704872
    Abstract: The present invention provides an improved technology of preventing illegal use and execution of a software program provided to a computer system. More particularly, the present invention is directed to a Processor of a type in which a memory managing unit is installed therein to manage storing operation of code/data in main memory and includes, as one of instruction set, an execution permitting instruction to permit execution of a program code (application) in the main memory. The procedure of execution permitting instruction is defined by a microprogram and includes an authentication procedure for authenticating the right to use the program beside a procedure for setting predetermined data in the memory managing unit in this invention. Execution of the software program is permitted only when the authentication processing is completed successfully. Because the authentication operation is performed within the processor, it is almost impossible to monitor or detect it from the exterior.
    Type: Grant
    Filed: April 28, 1999
    Date of Patent: March 9, 2004
    Assignee: International Business Machines Corporation
    Inventor: Takayuki Okada
  • Patent number: 6681313
    Abstract: In a system for conducting virtual address translation in a virtual memory system and implementing a table such as a Translation Lookaside Buffer, a system and method enabling quicker access to tables entries in which the entries are addressed after adding a plurality of address parts wherein the plurality is two (2) or (3). Particularly, a smaller and/or faster adder is used having, for example, only n=2 ports in the time critical path. In order to make the exact address calculation, during array accesses, a multiplexor is implemented to decide, after the TLB arrays are accessed for preselection, which of a plurality of possible entries has to be taken.
    Type: Grant
    Filed: May 8, 2000
    Date of Patent: January 20, 2004
    Assignee: International Business Machines Corporation
    Inventors: Son Dao Trong, Luis Parga Cacheiro, Rolf Sautter, Hans-Werner Tast
  • Patent number: 6675207
    Abstract: A compiler 2 sequentially simplifies, according to predetermined rules, a network of a processing flow defined by a PERT diagram and including a plurality of jobs executable in parallel, and determines which of any other jobs provide processing results causing each job to start and perform the processing when accepting them. Further, in the process of the simplification, if a pattern making the processing flow inexecutable, such as a loop, occurs in the network, the compiler 2 determines that the processing flow is inexecutable, and shows it to the user. If the processing flow is inexecutable, the compiler 2 generates a program for actualizing the processing of each job in the processing flow in synchronism with the processing of other jobs.
    Type: Grant
    Filed: February 14, 2000
    Date of Patent: January 6, 2004
    Assignee: International Business Machines Corporation
    Inventor: Rysuke Mamada
  • Patent number: 6658421
    Abstract: Digital signatures of various aspects or characterizing indicia of object code classes are used to determine whether a compiled class has built-in assumptions about external classes that are incorrect due to modification and recompilation of the external class. The indicia generally involve an encoding of the layout of various run time structures in the external class such as field tables or method tables.
    Type: Grant
    Filed: February 14, 2000
    Date of Patent: December 2, 2003
    Assignee: International Business Machines Corporation
    Inventor: Venkatadri Seshadri
  • Patent number: 6636866
    Abstract: A method and system for optimizing the representation of objects in an object-oriented programming language to reduce the memory requirement during the execution of the program, includes identifying the lifetimes of the various members of objects belonging to various classes. Next, the method uses the lifetime information to generate representations of objects belonging to these collections. Memory requirements are optimized by having members which do not have overlapping lifetimes share the same memory location.
    Type: Grant
    Filed: July 31, 2000
    Date of Patent: October 21, 2003
    Assignee: International Business Machines Corporation
    Inventor: Ganesan Ramalingam
  • Patent number: 6632741
    Abstract: A method of self-trimming pattern, includes forming a pattern containing a plurality of regular or irregular features within a first material deposited on a substrate, depositing a conformal layer of second material, and etching the second material to form spacers of the second material along the sidewalls of the features in the first material.
    Type: Grant
    Filed: July 19, 2000
    Date of Patent: October 14, 2003
    Assignee: International Business Machines Corporation
    Inventors: Lawrence A. Clevenger, Louis Lu-Chen Hsu, Jack A. Mandelman, Carl J. Radens
  • Patent number: 6614079
    Abstract: A complementary metal oxide semiconductor (CMOS) device having silicide contacts that are self-aligned to deep junction edges formed within a surface of a semiconductor substrate as well as a method of manufacturing the same are disclosed. Specifically, the CMOS device includes a plurality of patterned gate stack regions formed on a surface of a semiconductor substrate. Each plurality of patterned gate stack regions includes an L-shaped nitride spacer formed on exposed vertical sidewalls thereof, the L-shaped nitride spacer having a vertical element and a horizontal element, wherein the horizontal element is formed on a portion of the substrate that abuts each patterned gate stack region. Silicide contacts are located on other portions of the semiconductor substrate between adjacent patterned gate stack regions not containing the horizontal element of the L-shaped nitride spacer.
    Type: Grant
    Filed: July 19, 2001
    Date of Patent: September 2, 2003
    Assignee: International Business Machines Corporation
    Inventors: Kam Leung Lee, Ronnen Andrew Roy