Abstract: A tower/frame structure of interconnected columns and beams (which may be used in a cooling tower) and novel columns, beams, connection mechanisms and other components are provided. In one embodiment, a column and a beam are constructed of pultruded composite fiber-reinforced plastic (FRP) materials. The beam includes two sidewall extensions or flanges (each having one or more attachment apertures) at one end and which are integral with the beam for connection to the column (having one or more corresponding attachment apertures). The dimension/spacing between the inner walls of the two flanges substantially equals or is slightly larger than the outer dimension of the column. The attachment holes are aligned and a fastener is inserted through the extensions and column for attaching the column and beam. The C-shaped end of the beam substantially conforms to the cross-sectional shape and dimensions of the column.

Abstract: An apparatus, method, and computer program process audio information in a communication system. The apparatus, method, and computer program identify one or more silent channels of a communication session. The apparatus, method, and computer program also mix audio information from two or more non-silent channels. The mixed audio information is provided to one or more of the channels of the communication session.

Abstract: The present invention relates generally to a wale for use in bracing a retaining wall. The wale is comprise of a back wall, a front wall having a channel formed therein, and a plurality of connecting walls connecting the back and front walls to form at least one chamber between the back and front walls. In one embodiment, the wale is of unitary construction and the plurality of connecting walls includes top and bottom walls which form a single chamber between the back and front walls. In an alternative embodiment, the wale is of a unitary construction and the plurality of connecting walls includes a top, upper reinforcing, lower reinforcing, and bottom walls, which form a plurality of chambers between the back and front walls. The wale may by made of a pultruded composite material such as a fiberglass reinforced plastic (FRP) resin impregnated composite. A seawall system using such a waler is also described.

Abstract: A body, such as a connector for use in cable assemblies, includes a staking pin or retaining body inserted and secured within an aperture extending from a first surface to a second surface of the body. A portion of the pin extends through the aperture and beyond one of the surfaces (which provides a pin function for a desire application). A plurality of projections or grooves positioned along the external surface of the staking pin are substantially flush with a surface of the aperture to retain its position in the body. The staking pin includes a cavity, a portion of which preferably has a chamfered surface to aid in disposing an object, such as a staking pin ball, within the cavity. The cavity is capable of radially expanding when the staking pin ball, having an outer dimension greater than an inner dimension the cavity, is inserted within the cavity of the pin.

Abstract: A digital power amplifier (or power switching amplifier or power switch) for use in a digital transmitter includes a low impedance multi-stage driver circuit having a low impedance pre-driver and a low impedance driver. The drive circuit drives a power switch stage having two power transistors configured in a current mode class-D push-pull configuration. Utilization of gallium nitride (GaN) transistors or pseudomorphic high electronic mobility transistors (pHEMT) (or combination thereof) and sizing the transistors progressively larger in the driver than in the pre-driver (at least about 3×) provides a reduction in output impedance of the driver circuit and progressive increases in the power driving capability of the succeeding stage. This allows the use of a power amplifier at higher frequencies without altering or affecting the power efficiency and allows use of a digital power amplifier for a digital transmitter.

Abstract: A connector module includes a jack socket capable of receiving a communication link. The connector module also includes magnetics coupled to the jack socket for facilitating at least one of communication of information to a peripheral device coupled to the link and reception of information from the peripheral device. The connector module further includes physical layer logic coupled to the magnetics for supporting a physical layer protocol used to at least one of communicate the information to and receive the information from the peripheral device.

Abstract: A multi-channel fiber optic cable connector is provided for connecting the terminal ends of fiber optic cables utilizing alignment sleeves to align the adjacent termini of optical fibers included within respective ones of the cables. A retention mechanism, a sleeve retainer, secured within the connector, is provided that secures the alignment sleeve within the connector. In another aspect, a single floating seal assembly extends around a termini and seals between the termini and a connector housing. The single seal assembly provides a dual sealing function, sealing between an aperture of a floating collar and the termini body and sealing between the floating collar and a seal surface of a bore in the connector housing.

Abstract: A fiber optic termini device having an inner bore for receiving a terminating end of a fiber optic cable includes a rearward extending crimp member or body. The crimp member is formed of two distinct portions, either integrally formed or by a combination of two separate components. A first portion has a first outside diameter while the second portion has a second outside diameter that is less than the outside diameter of the first portion. The second portion extends longitudinally rearward from the first portion. Both portions have crimp grooves or protrusions for securing material positioned between a crimp sleeve and the first and second portions.

Abstract: A method and apparatus for a first network device to identify the VLAN for which the first network device is a member. In response to the broadcasting of a discovery request message by the first network device, a second network device transmits a first data message including VLAN information relating to the VLANs configured on the network. From the VLAN information, the first network device determines the VLAN ID of the VLAN in which the first network device is a member.

Abstract: Methods and apparatus are provided for efficiently coupling singly terminated networks with doubly terminated networks. An isolation network is disposed between a singly terminated network and a doubly terminated network. The isolation network is a three terminal device having an input terminal connected to the output of the singly terminated network and having an output terminal connected to the input of the doubly terminated network. An isolation terminal is provided that receives and dissipates energy reflected from the input of the doubly terminated network, such that substantially no energy is received or seen by the output of the singly terminated network.

Abstract: A bib includes an edge. The bib also includes an internal pocket. The pocket has an opening that extends along the edge of the bib.

Abstract: A redundant electric fuse circuit is provided that includes a plurality of fuses coupled in series and each having a fuse control device operable for generating a current through each fuse sufficient to blow the fuse. A first fuse control signal is activated to generate a sufficient current through one of the fuses to blow the fuse. A second fuse control signal is activated to generate a sufficient current through the other fuse to blow that fuse. The electric fuse circuit provides redundancy thereby increasing the yield of integrated circuits by reducing the probability that a defective fuse (i.e., a fuse that reforms after blowing) will cause a fatal defect in the integrated circuit.

Abstract: An apparatus (and method) is provided that reduces thermal interference in the read signal of a disk drive. A variable or programmable resistance is used to change the transfer function of a filter in the read channel of the disk drive to filter the read signal. The filter has a first transfer function (first cut-off frequency) related to the programmed resistance during normal operation of the disk drive (i.e. when thermal interference is not detected). When thermal interference is detected in the read signal, the resistance is programmed to another value resulting in the filter having a second transfer function (second cut-off frequency). The resistance element is variable or programmable to different values resulting in different programmable transfer functions (or one of a multitude of cut-off frequencies) for the filter.

Abstract: A circuit and method for reconstructing the back emf of a floating coil of a polyphase dc motor in PWM mode is provided. The floating coil is coupled to a first capacitor through a floating phase switch that closes during a pulse produced by the PWM drive signaling the appropriate time to sample in the PWM cycle. The signal on the floating coil is sampled and the sampled signal is stored using a capacitor. After the sampling period, the stored signal is discharged (or charged) at a rate that substantially models the slew rate or slope rate of the expected back emf signal at or near the zero crossing of the back emf signal with the common tap signal. The voltage across the capacitor is a reconstruction of the actual back emf and is generated using samples of the back emf. The reconstructed back emf is compared to the center tap voltage to more accurately detect the zero crossing.

Abstract: An apparatus (and method) is provided that reduces noise in an embedded DRAM caused by noise in the Vdd supply. A circuit switches or decouples the bit line precharge voltage supply from the memory array to reduce noise in the memory array at time of bit line sensing. In addition, another circuit is utilized to switch or decouple the memory cell plate voltage supply from the memory array to reduce noise in the memory array at the time of bit line sensing. The circuit(s) includes a switch to perform the decoupling, or alternatively, include a switch coupled in parallel with a high impedance.

Abstract: A circuit and method for clocking counters in a polyphase dc motor is provided in which the motor is capable of operating at two or more operating states, spin-up and regulation. The system clock is connected to the clocking circuit through dividers to produce a first clock signal having a low frequency for operating the counter at spin-up, and a second clock signal having a higher frequency for operating the counter at regulation. The clocking circuit includes a switch for connecting the first clock signal to the clock input of the counter when the motor is at spin-up, and for connecting the second clock signal to the clock input when the motor is at regulation. The switch is controlled by a switch control circuit that ensures that switching does not occur when the counter is timing the motor by only allowing the switching to occur when the counter is at an end of a timing cycle and before the counter resets. An at-speed circuit is used to determine whether the motor is at spin-up or at regulation.

Abstract: A semiconductor device structure and method are presented for increasing a breakdown voltage of a junction between a substrate of first conductivity type and a device region. The structure includes a region of second conductivity type in the substrate completely buried in the substrate below and separated from the device region. The region of second conductivity type is located a predetermined distance away from the device region. The distance is sufficient to permit a depletion region to form between the region of second conductivity type and the device region, when a first voltage is applied between the device region and the substrate. The distance also is determined to produce a radius of curvature of the depletion region, when a second voltage that is larger than the first voltage is applied between the device region and the substrate, that is larger than a radius of curvature of the depletion region about the device region that would be formed if the region of second conductivity type were not present.

Abstract: A low noise preamplifier design which is configured such that the current through the first stage load resistor may be made relatively small in value making it possible to achieve a relatively large gain in the first stage thereby reducing the noise contribution of the load resistor and, concurrently, significantly reducing the noise contribution of the second stage as well. This is effectuated by supplying a substantially fixed amount of current to certain nodes in the first stage of the preamplifier through a pair of current sources, the currents being of an amount sufficient to subtract out the bias current that is applied through a series connected variable resistance, such as that of a magnetoresistive ("MR") read head. As a consequence, only a relatively small amount of current is actually fed through the load resistor, and its value may be increased to provide an increased gain for the first stage.

Abstract: A voltage regulator for producing an output voltage that selectively tracks a logic voltage or a reference voltage and method of operating the voltage regulator. The voltage regulator has a diode OR with a logic and reference transistors. The logic voltage is scaled to be close in value to the reference voltage, if the two are not close in value. When the scaled logic voltage is larger than the reference voltage the logic transistor is on, turning off the reference transistor and passing the logic voltage to the output of the diode OR. When the scaled logic voltage is smaller than the reference voltage the logic transistor is off and the reference transistor is on, passing the reference voltage to the output of the diode OR. The voltage at the output of the diode OR is then compared in a comparator with the voltage at the output of the voltage regulator, which is scaled by the same factor as the logic voltage.