Patents Represented by Attorney Ronald R. Shea, Esq.
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Patent number: 8001647Abstract: An improved flocked foam applicator has a cylindrically shaped hollow rigid shell configured to slide onto a rigid core coupled to a handle. A rigid planar surface extends from the bottom of the hollow rigid shell forward. Applicator flock extends downward from the rear cylindrical portion of the hollow rigid shell, around the bottom of the hollow rigid shell, and outward to the distal edge of the rigid planar surface. The distal edge of rigid planar surface extends further forward than the leading edge of the cylindrical hollow rigid shell. As a result of this design, the improved flocked foam applicator can apply a liquid applicant to a floor all the way up to a baseboard or wall, and will further prevent the leading edge of the cylindrical portion from coming into contact with a baseboard or wall and depositing fluid in an undesired location.Type: GrantFiled: February 3, 2008Date of Patent: August 23, 2011Inventor: James J. Felton
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Patent number: 7779058Abstract: A video network includes public kiosks having digital storage capacity. Centralized inventory control manages the video files stored at individual kiosks or network LANs. A user requests a multimedia file for download, and selects various ancillary files and control features, such as languages, subtitles, control of nudity, etc. The requested file is encrypted according to an encryption key, watermarked, and downloaded from a high-speed port of a public kiosk to a hand-held proprietary high speed memory device of a user. Payment is received at the time of request or at the time of download, and royalties are distributed by the video network to copyright holders. Computer applications or playback devices allow users to store and/or play video files that have been downloaded to a hand-held device while managing and enforcing digital rights of content providers through the watermarking and/or encryption.Type: GrantFiled: February 22, 2008Date of Patent: August 17, 2010Inventor: Ronald Raymond Shea
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Patent number: 7750446Abstract: Disclosed are IC package structures comprised of standard IC packages modified with separate circuit interconnection structures and disposed to interconnect either directly to other IC packages or to intermediate pedestal connectors which serve to support and interconnect various circuit elements, thus effectively allowing critical signals to bypass the generally less capable interconnection paths within standard interconnection substrates.Type: GrantFiled: July 14, 2005Date of Patent: July 6, 2010Assignee: Interconnect Portfolio LLCInventors: Joseph C. Fjelstad, Kevin P. Grundy, Gary Yasumura
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Patent number: 7737545Abstract: An IC package having multiple surfaces for interconnection with interconnection elements making connections from the IC chip to the I/O terminations of the package assembly which reside on more than one of its surfaces and which make interconnections to other devices or assemblies that are spatially separated.Type: GrantFiled: February 13, 2006Date of Patent: June 15, 2010Assignee: Interconnect Portfolio LLCInventors: Joseph C. Fjelstad, Para K. Segaram, Thomas J. Obenhuber, Inessa Obenhuber, legal representative, Kevin P. Grundy
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Patent number: 7732904Abstract: A cost effective, high performance, IC package assembly of the present invention comprises stair-stepped layers of redistribution circuits from at least one chip to terminals on any of multiple surfaces and levels of the IC package assembly. Critical path circuits of the assembly have no plated vias and are directly routed from interconnection terminals which are used to interconnect the package to the IC chip terminals by flip chip or wire bond methods.Type: GrantFiled: October 12, 2004Date of Patent: June 8, 2010Assignee: Interconnect Portfolio LLCInventors: Joseph C. Fjelstad, Para K. Segaram, Thomas J. Obenhuber, Inessa Obenhuber, legal representative, Kevin P. Grundy, William F. Wiedemann
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Patent number: 7701323Abstract: Disclosed are low profile discrete electronic component structures that are suitable for placement and use in a vertical interconnection mode either within an electronic interconnection substrate, between interconnection substrate and electronic component or within an IC package.Type: GrantFiled: June 1, 2004Date of Patent: April 20, 2010Assignee: Interconnect Portfolio LLCInventors: Joseph C. Fjelstad, Kevin P. Grundy, Para K. Segaram, William F. Wiedemann, Thomas J. Obenhuber, Inessa Obenhuber, legal representative
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Patent number: 7663504Abstract: An emergency vehicle transmits a Vehicle Present Signal when in transit on public roads responding to an emergency. The signal can include information relating to the type of emergency vehicle, local highway and terrain data, and the location, speed and direction of travel of the emergency vehicle. When the Vehicle Present Signal is detected by a first vehicle, a functional circuit within the first vehicle calculates the distance between the emergency vehicle and the first vehicle. If the vehicles are within a predetermined distance, a warning signal activates one or more warning systems, thereby notifying the driver of the first vehicle that an emergency vehicle is in the vicinity. A dead-band defined by first and second predetermined distances can be incorporated to prevent rapid cycling of the warning signal.Type: GrantFiled: December 8, 2005Date of Patent: February 16, 2010Inventors: Sean Robert Votaw, Ronald Raymond Shea
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Patent number: 7651382Abstract: An electrical interconnection device for establishing redundant contacts between the ends of two conductive elements to be mated, creating a electrical interconnection without capacitive stubs.Type: GrantFiled: May 27, 2008Date of Patent: January 26, 2010Assignee: Interconnect Portfolio LLCInventors: Gary Yasumura, Joseph C. Fjelstad, Kevin P. Grundy, William F. Wiedemann, Matthew J. Stepovich
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Patent number: 7651336Abstract: An electrical connector comprised of a plurality of electrical contacts arranged in a stair-step configuration designed to mate with electrical components having electrical contacts arranged in a stair-step configuration. A direct connect signaling system comprised of stair-step electrical connectors mated to stair-step printed circuit boards, other stair-step electrical components, or combinations thereof.Type: GrantFiled: October 8, 2007Date of Patent: January 26, 2010Assignee: Interconnect Portfolio LLCInventors: Gary Yasumura, Joseph C. Fjelstad, William F. Wiedemann, Para K. Segaram, Kevin P. Grundy
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Patent number: 7652381Abstract: Structures employed by a plurality of packages, printed circuit boards, connectors and interposers to create signal paths which reduce the deleterious signal quality issues associated with the use of through-holes. Disclosed structures can coexist with through-hole implementations.Type: GrantFiled: February 9, 2005Date of Patent: January 26, 2010Assignee: Interconnect Portfolio LLCInventors: Kevin P. Grundy, Joseph C. Fjelstad, Gary Yasumura, William F. Wiedemann, Para K. Segaram
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Patent number: 7613011Abstract: A signal-segregating connector for use in a system having a printed circuit board, a first electrical structure and a second electrical structure. The connector includes a first set of conductive elements to convey signals between the first electrical structure and the printed circuit board, and a second set of conductive elements to convey signals between the first electrical structure and the second electrical structure.Type: GrantFiled: May 14, 2007Date of Patent: November 3, 2009Assignee: Interconnect Portfolio LLCInventors: Kevin P. Grundy, Gary Yasumura, Joseph C. Fjelstad, William F. Wiedemann, Para K. Segaram
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Patent number: 7466021Abstract: Disclosed are IC package structures having stair stepped layers and which have no plated vias. Such structures can be fabricated either as discrete packages or as strips such as might be beneficial in for use with memory devices wherein critical or high speed signals can be routed along the length of the multi-chip strip package without having to have the signals ascend and descend from the interconnection substrate on which the assembly is mounted to the IC package termination and back as the signal transmits between devices.Type: GrantFiled: May 2, 2006Date of Patent: December 16, 2008Assignee: Interconnect Portfolio, LLPInventor: Joseph Charles Fjelstad
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Patent number: 7404746Abstract: An electrical interconnection device for establishing redundant contacts between the ends of two conductive elements to be mated, creating a electrical interconnection without capacitive stubs.Type: GrantFiled: December 1, 2006Date of Patent: July 29, 2008Assignee: Interconnect Portfolio, LLCInventors: Gary Yasumura, Joseph C. Fjelstad, Kevin P. Grundy, William F. Wiedemann, Matthew J. Stepovich
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Patent number: 7388279Abstract: Disclosed are tapered dielectric and conductor structures which provide controlled impedance interconnection while signal conductor lines transition from finer pitches to coarser pitches thereby obviating electrical discontinuities generally associated with changes of circuit contact pitch. Also disclosed are methods for the construction of the devices and applications therefore.Type: GrantFiled: November 12, 2004Date of Patent: June 17, 2008Assignee: Interconnect Portfolio, LLCInventors: Joseph C. Fjelstad, Kevin P. Grundy, Para K. Segaram, Gary Yasumura
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Patent number: 7347697Abstract: Interconnection assemblies which adjust their alignment and performance through the use of control feedback from the data transferred through the assemblies.Type: GrantFiled: March 28, 2005Date of Patent: March 25, 2008Assignee: Novias, Inc.Inventors: Kevin P. Grundy, Gary Yasumura
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Patent number: 7310239Abstract: Disclosed are embodiments of an integrated circuit die interconnection interposer suited to controlled high performance transmission of electronic or optical signals or combinations thereof. The various embodiments are designed to provide direct path interconnections away from the surface of one or more integrated circuit die. The structures are amenable to improved thermal management and can be fabricated on at semiconductor wafer.Type: GrantFiled: February 18, 2005Date of Patent: December 18, 2007Inventors: Joseph C. Fjelstad, Kevin P. Grundy
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Patent number: 7308524Abstract: A memory system having a plurality of memory devices and a memory controller. The memory devices are coupled to one another in a chain. The memory controller is coupled to the chain and configured to output a memory access command that is received by each of the memory devices in the chain and that selects a set of two or more of the memory devices to be accessed.Type: GrantFiled: January 13, 2004Date of Patent: December 11, 2007Assignee: Silicon Pipe, IncInventors: Kevin P. Grundy, Para K. Segaram
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Patent number: 7307293Abstract: A direct-connect signaling system including a printed circuit board and first and second integrated circuit packages disposed on the printed circuit board. A plurality of electric signal conductors extend between the first and second integrated circuit packages suspended above the printed circuit board.Type: GrantFiled: April 29, 2003Date of Patent: December 11, 2007Assignee: Silicon Pipe, Inc.Inventors: Joseph C. Fjelstad, Para K. Segaram, Belgacem Haba
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Patent number: 7205613Abstract: An IC package substrate having integral ESD protection features and elements and a method for construction of the same are disclosedType: GrantFiled: January 7, 2005Date of Patent: April 17, 2007Assignee: Silicon PipeInventors: Joseph C. Fjelstad, Kevin P. Grundy