Abstract: Embodiments described herein provide for a portable computer with a contact-sensitive display having a user-interface that is configurable through user-contact with the display. An active input area may be provided that is configurable in appearance and functionality. The contents of the active input area, its functionality, and the manner in which it is oriented, particularly with respect to a left or right handedness, are described herein.

Abstract: Searching a database involves creating an access structure including a first tree data structure having a root node and at least one child node. Each child node is associated with match data corresponding to a data value of a field of a database record. Leaf child nodes of the first tree data structure include a link to another tree data structure in the access structure. Leaf child nodes of a further tree data structure include a link to a database record. The tree structures are traversed and scores are computed for the paths traversed that reflect the level of matching between the match pattern data of the nodes in a path and a search request to identify a database record that best matches the request.

Abstract: A computing device is provided that includes a display comprising a plurality of discrete elements. A memory is used to store a data collection of paginated content. A processor of the computing device is configured to retrieve each of the pages from the memory. The processor signals the display to individually present each of the pages. A sensor device is coupled to the processor. The sensor device is deflectable to signal the processor a deflection value that causes the processor to sequentially present at least portions of multiple pages on the display.

Abstract: A miniature keyboard wherein the keys are arranged in a way to improve data entry and decrease the chance of depressing multiple keys at a time. Accordingly, the height of the keys are patterned to decrease the chance of multiple key depressions thus increasing the accuracy of data input into the personal digital assistant. In one embodiment, the height of the keys is alternated down the individual rows of keys. In another embodiment, the height of the keys is alternated across individual columns of keys. Similarly, in another embodiment, the heights of the keys are arranged in a checkered pattern on the keyboard. In addition, another embodiment staggers the heights of the keys and incorporates embodiments mentioned above. By incorporating different key arrangements and alternating the height of the keys, key differentiation, key navigation, and data input accuracy is greatly improved due to the improved tactile feedback provided by the miniature keyboard.

Abstract: A small form-factor keyboard or keypad for key structures is provided in which individual key structures have a contact surface on which there is a center reference and a peak. The center reference and the peak or offset, so that an offset distance between the center reference and the peak is greater than or equal to zero. The offset distance for at least two or more key structures in the plurality of key structures may different. The difference in the offset distance may be based on a position of the individual key structures relative to a first reference line.

Abstract: A method of controlling a content addressable memory (CAM) device. A data structure is generated that specifies (i) a prioritized set of rules and (ii) storage locations within the CAM device for one or more match clauses of each of the rules. A new rule having a specified priority is recorded in the data structure. Candidate storage locations within the CAM device are identified within the CAM device for the match clauses of each of the rules having a lower priority than the new rule. The candidate storage locations are compared with the storage locations specified by the data structure. Each match clause for which the candidate storage location does not match the specified storage location is stored in the CAM device.

Abstract: An integrated circuit device for delivering power to a load includes a P-MOS power transistor, an N-MOS bypass transistor and a gate driver circuit. The P-MOS power transistor is coupled between a supply voltage node and a power output node of the integrated circuit device, and the N-MOS bypass transistor is coupled between the power output node and a reference node of the integrated circuit device. The gate driver circuit responds to a pulse-width-modulated (PWM) control signal by outputting an active-low drive-enable signal to a gate terminal of the P-MOS power transistor and an active-high bypass-enable signal to a gate terminal of the N-MOS bypass transistor during respective, non-overlapping intervals.

Abstract: An integrated circuit device for processing an access control list. The integrated circuit device includes a first content addressable memory (CAM) including a plurality of CAM blocks to generate respective match indices, each match index indicating a storage location within the corresponding CAM block of an entry that matches a search key. The integrated circuit device further includes a plurality of memory arrays to receive the match indices from the CAM blocks and to output respective lookup values from storage locations indicated by the match indices, each lookup value including information that indicates an action to be taken with respect to a packet used to obtain the search key and information that indicates a priority of the action relative to actions indicated by information in others of the lookup values.

Abstract: Techniques to make e-mail correspondent-centric rather than message-centric, and reduce junk e-mail. Tabulates, maintains, and updates useful information about the user's chosen correspondents, and the history and status of each correspondence series. Filters incoming messages from an unrecognized sender, asking user whether to add sender to correspondent list, and if so prompts user for needed information. Eliminates the need to search for e-mail addresses. Facilitates viewing sequential messages to and from a correspondent. Provides an effective tool to eliminate junk-mail by making it simpler and more practical to screen messages or change one's e-mail address. When user changes his e-mail address, automates notification of user's chosen correspondents, and in some cases can automatically update such correspondents' e-mail address lists. Eliminates need to manually create and maintain mailboxes or folders. Allows automated organization of e-mail by correspondent.

Abstract: A content addressable memory device including a memory to store a searchable database, a search circuit, and a first-in-first-out storage circuit. The search circuit generates a plurality of address values that correspond to unoccupied storage locations within the memory, and the plurality of address values are queued within the first-in-first-out storage circuit to enable the address values to be read in succession by an external device.

Abstract: A keyboard for an electronic device that incorporates a flexible carrier for the keys. The flexible carrier has cutouts or slots that aid in decoupling the actions of one from its neighbors. Moreover, in addition to or instead of cutouts or slots, the flexible carrier optionally has cutouts around its outer perimeter. In some embodiments, the keys are molded as part of the flexible carrier. In other embodiments, the keys are attached to or inserted in the flexible carrier during manufacture. Various embodiments of the invention employ various key shapes to aid the user's tactile experience while typing.

Abstract: Disclosed herein are embodiments of an asynchronous memory device that use internal delay elements to enable memory access pipelining. In one embodiment, the delay elements are responsive to an input load control signal, and are calibrated with reference to periodically received timing pulses. Different numbers of the delay elements are configured to produce different asynchronous delays and to strobe sequential pipeline elements of the memory device.

Abstract: A single-piece top surface display and integrated front cover for an electronic device. In one embodiment, the cover comprises a thin, flexible, transparent layer coupled with a supporting structure. The flexible layer is supported above a display screen which is coupled with pressure activated sensors located under the display screen. The cover is dust-free, waterproof, and has a flat outer surface that is free of any steps or indentations. Users input data by applying pressure on the cover which causes the display screen to deflect and activate the sensors. The pressure exerted on the sensors is triangulated to register the position of the user input. In another embodiment, the cover is transparent, rigid, and directly contacts the pressure activated sensors which are located in front of the display screen or in the housing behind it. When pressure is applied to the cover, the cover deflects and activates the sensors. In both embodiments, an accelerometer identifies valid input events.

Abstract: An integrated circuit device having a test sequence generator, first and second transceivers and a test sequence analyzer. The test sequence generator generates a test data sequence in response to a test mode selection. The first transceiver receives the test data sequence from the test sequence generator and is configured in a loopback mode to transmit and receive the test data sequence. The second transceiver receives the test data sequence received by the first transceiver and is configured in a loopback mode to transmit and receive the test data sequence. The test sequence analyzer determines whether the test data sequence received by the second transceiver matches the test data sequence generated by the test sequence generator.

Abstract: The fabrication of the wafer may be analyzed starting from when the wafer is in a partially fabricated state. The value of a specified performance parameter may be determined at a plurality of locations on an active area of a die of the wafer. The specified performance parameter is known to be indicative of a particular fabrication process in the fabrication. Evaluation information may then be obtained based on a variance of the value of the performance parameter at the plurality of locations. This may be done without affecting a usability of a chip that is created from the die. The evaluation information may be used to evaluate how one or more processes that include the particular fabrication process that was indicated by the performance parameter value was performed.

Abstract: A hierarchical programmable-priority content addressable memory (CAM) system including first, second and third CAM devices. The first CAM device has a first priority number output and a first enable input. The second CAM device has a priority number input and an enable output coupled to the priority number output and the first enable input, respectively, of the first CAM device. The second CAM device also has a priority number output and an enable input. The third CAM device has a priority number input and an enable output coupled to the priority number output and the enable input, respectively, of the second CAM device.