Patents Represented by Attorney Sixbey, Friedman, Leedom & Ferguson, PC
  • Patent number: 6013930
    Abstract: A bottom-gate-type semiconductor device comprising crystalline semiconductor layers, in which the source/drain regions each have a laminate structure comprising a first conductive layer (n.sup.+ layer), a second conductive layer (n.sup.- layer) of which the resistance is higher than that of the first conductive layer, and an intrinsic or substantially intrinsic semiconductor layer (i-layer). In this, the n.sup.- layer functions as an LDD region, and the i-layer functions as an in-plane offset region. The semiconductor device has high reliability and high reproducibility, and is produced in a simple process favorable to mass-production.
    Type: Grant
    Filed: September 22, 1998
    Date of Patent: January 11, 2000
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama, Takeshi Fukunaga
  • Patent number: 6013929
    Abstract: A gate insulating film 103 is oxidized by a thermal oxidation method using a gate electrode 104 as a mask. At this time, the thickness of the gate insulating film 103 becomes thicker so that the portions indicated by 106 and 107 are obtained. The thickness of an active layer becomes thin at an end 112 of a channel, so that the distance from the gate electrode becomes long by the thickness. Then the strength of an electric field between a source and drain is relaxed by this portion. In this way, a thin film transistor having improved withstand voltage characteristics and leak current characteristics is obtained.
    Type: Grant
    Filed: July 7, 1998
    Date of Patent: January 11, 2000
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Hisashi Ohtani
  • Patent number: 6011277
    Abstract: A thin film field effect transistors and manufacturing method for the same are described. The channel region of the transistor is spoiled by an impurity such as oxygen, carbon, nitrogen. The photosensitivity of the channel region is reduced by the spoiling impurity and therefore the transistor is endowed with immunity to illumination incident thereupon which would otherwise impair the normal operation of the transistor. The spoiling impurity is not introduced into transistors which are located in order not to receive light rays.
    Type: Grant
    Filed: September 9, 1998
    Date of Patent: January 4, 2000
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shunpei Yamazaki
  • Patent number: 6010924
    Abstract: A semiconductor device comprising at least two thin film transistors on a substrate having an insulating surface thereon, provided that the thin film transistors are isolated by oxidizing the outer periphery of the active layer of each of the thin film transistors to the bottom to provide an oxide insulating film.
    Type: Grant
    Filed: April 29, 1997
    Date of Patent: January 4, 2000
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yasuhiko Takemura, Hiroki Adachi
  • Patent number: 6010129
    Abstract: A sheet sorter includes a plurality of bins arranged in a vertical direction each of which receives a plurality of sheets discharged from an image recording apparatus and forms thereon a stack of sheets. A sheet transfer mechanism transfers the sheets discharged from the image recording apparatus, and an indexer receives the sheets from the sheet transfer mechanism and distributes the sheets to the respective bins through the sheet inlet ends. A sheet stack ejector mechanism ejects the stack of sheets on each of the bins beyond the sheet inlet end of the bin by a predetermined length, thereby giving a stapler access to the stack of sheets. The ejector mechanism includes a guide rail which extends in a vertical direction through the bins, and a sheet stack ejector member which is mounted on the guide rail to be movable up and down along the guide rail and is adapted to eject the stacks of sheets on the respective bins one by one toward the stapler.
    Type: Grant
    Filed: May 13, 1997
    Date of Patent: January 4, 2000
    Assignees: Nisca Corporation, Riso Kagaku Corporation
    Inventors: Naoto Mochizuki, Makoto Miyaki
  • Patent number: 6008733
    Abstract: A plurality of air conditioning system control units are connected to each other through a communication line (20). Discharge resistors (R1, R2) are provided for discharging residual charges of the communication line (20). The control unit has a power superposition circuit (50) for applying a direct-current voltage and outputs an identification number signal from the power superposition circuit (50) to the communication line (20). The control unit further has a polarity select circuit (60) having a negative-polarity resistance characteristic that current increasingly flows as an applied voltage is lowered, and a voltage discriminating circuit (70) for detecting the terminal voltage of the polarity select circuit (60). When detecting the voltage of the communication line (20), the control unit determines whether its own control unit is a master unit or a slave unit according to output signals from the voltage discriminating circuit (70) and a polarity discriminating circuit (3C).
    Type: Grant
    Filed: June 28, 1996
    Date of Patent: December 28, 1999
    Assignee: Daikin Industries, Ltd.
    Inventors: Takashi Okano, Kouji Kamafusa, Hisatoshi Kawakami
  • Patent number: 6008101
    Abstract: It is intended to provide a technique of separately forming thin-film transistors disposed in a peripheral circuit area and those disposed in a pixel area in accordance with characteristics required therefor in a manufacturing process of semiconductor devices to constitute a liquid crystal display device. In an annealing step by laser light illumination, laser light is selectively applied to a semiconductor thin-film by partially masking it. For example, to illuminate the peripheral circuit area and the pixel area with laser light under different conditions in manufacture of an active matrix liquid crystal display device, laser light is applied at necessary illumination energy densities by using a mask. In this manner, a crystalline silicon film having a necessary degree of crystallinity in a selective manner can be obtained.
    Type: Grant
    Filed: November 12, 1997
    Date of Patent: December 28, 1999
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Koichiro Tanaka, Naoaki Yamaguchi
  • Patent number: 6002101
    Abstract: A method of manufacturing a semiconductor device by emitting a laser beam from an excimer laser, modifying an energy distribution by passing the beam through a lateral flyeye lens followed by a vertical flyeye lens, condensing the laser beam in two perpendicular sections by two cylindrical lenses to give the beam a rectangular shape, where the longer side can be in excess of 10 cm, then scanning the beam with a single direction over a semiconductor device.
    Type: Grant
    Filed: October 23, 1997
    Date of Patent: December 14, 1999
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hongyong Zhang, Hiroaki Ishihara
  • Patent number: 6000696
    Abstract: A game machine enabled to make various responses by adding the psychosomatic state and emotion of the player as one of conditions for determining the responding manner. The psychosomatic state of the player is grasped to change the responses in accordance with the psychological state of the player by making use of both a chaos attractor obtained by numerically processing the information sampled from the player and the index indicating the degree how the chaos attractor matches the defining condition of the chaos.
    Type: Grant
    Filed: May 15, 1998
    Date of Patent: December 14, 1999
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Akiharu Miyanaga, Toshiji Hamatani
  • Patent number: 6001712
    Abstract: In an insulated gate field effect semiconductor device, the gate electrode formed on the gate insulating film includes the first and second semiconductor layers as a double layer. An impurity for providing one conductivity type is not contained in first semiconductor layer which is in contact with a gate insulating film and is contained at a high concentration in the second semiconductor layer which is not in contact with the gate insulating film. Accordingly, By existence of the first semiconductor layer is which the impurity is not doped, the impurity is prevented from penetrating through the gate insulating film from the gate electrode and diffusing into the channel forming region. Also, by existence of the second semiconductor layer in which high concentration impurity is doped, the gate electrode has low resistance.
    Type: Grant
    Filed: June 2, 1995
    Date of Patent: December 14, 1999
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Yukio Yamauchi
  • Patent number: 5996837
    Abstract: An apparatus and method for forming a lid having an annular mounting portion, an annular trough region positioned radially inward of the annular mounting portion, an annular side wall extending upwardly from an inner periphery of the annular trough region to an annular ridge adjacent said annular side wall, and a crown region is set forth. The apparatus includes a forming die having an upper surface of a configuration conforming to the configuration of the lid, a forming ring for aiding in the forming of the lid, a positioning device for positioning the thermoformable sheet material adjacent the upper surface of the forming die between the forming die and the forming ring and a drive mechanism for lowering the forming ring into contact with the sheet material. The method includes contacting that portion of the sheet material which forms a lowermost region of the lid with the forming ring so as to carry the material down into the lowermost region of the forming die.
    Type: Grant
    Filed: July 30, 1997
    Date of Patent: December 7, 1999
    Assignee: Fort James Corporation
    Inventors: Michael Alan Freek, Scott Goodyear, Jack Patel
  • Patent number: 5998841
    Abstract: There is provided a combination of doping process and use of side walls which allows the source and drain of a thin film transistor of an active matrix circuit to be doped with only one of N-type and P-type impurities and which allows the source and drain of a thin film transistor used in a peripheral circuit of the same conductivity type as that of the thin film transistor of the active matrix circuit to include both of N-type and P-type impurities. Also, a thin film transistor in an active matrix circuit has offset regions by using side walls, and another thin film transistor in a peripheral circuit has a lightly doped region by using side walls.
    Type: Grant
    Filed: October 5, 1998
    Date of Patent: December 7, 1999
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Hideomi Suzawa
  • Patent number: 5998693
    Abstract: The flexible adhesive element (100) has a profile that is generally anchor-shaped, with an essentially rectilinear central branch (101) and with two curved side branches (102, 103). The central branch (101) is designed to extend to the peri-areolar zone of the breast concerned so as to cover said zone, and the two side branches (102, 103) are designed to extend along the fold beneath the breast to cover said fold at least in part.
    Type: Grant
    Filed: June 17, 1997
    Date of Patent: December 7, 1999
    Inventor: Andre Zagame
  • Patent number: 5999241
    Abstract: A liquid crystal display device is characterized by comprising first and second substrates on a surface of which electrodes are formed, a liquid crystal material with ferroelectricity or antiferroelectricity interposed between the first and second electrodes, and an orientation film and disposed between the electrode or electrodes formed on the surface of said first and/or second substrate whose surface has been subjected to a process which gives optically uniaxial orientation to the liquid crystal material, wherein said orientation film has a pretilt angle of 1.6 to 3.1 degree with respect to a nematic liquid crystal. Further, a value of a polar term of surface tension on the surface of the orientation film ranges from 11 to 15 dyne/cm.
    Type: Grant
    Filed: October 22, 1997
    Date of Patent: December 7, 1999
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takeshi Nishi, Toshimitsu Konuma
  • Patent number: 5992995
    Abstract: The invention relates to apparatus for fixing lenses to a spectacles frame, the apparatus comprising, for each lens, a flexible rim element passing along an associated bezel and being secured to the frame on either side of the lens. According to the invention, each flexible element (20) is organized to have two end loops (23, 24) which are secured to the frame (2) on either side of the lens (V) in question, merely by engaging over said frame.
    Type: Grant
    Filed: June 18, 1998
    Date of Patent: November 30, 1999
    Inventor: Jean-Claude Perie
  • Patent number: 5992577
    Abstract: The invention relates to an arrangement of carbon brake disks for an aircraft brake unit comprising stators coupled to a torsion tube alternating with rotors coupled to the corresponding wheel. The arrangement is organized in two configurations corresponding to operation over two successive wear strokes of the pistons of the brake ring, with a first of the configurations comprising a central group of rotors and stators arranged between a front lateral stator and a rear lateral stator, and with a second of the configurations comprising the same front lateral stator and the same rotors and stators of the central group, but arranged between a spacer disk of thickness less than the wear stroke of the pistons, and a new rear lateral stator of thickness greater than that of the preceding rear lateral stator.
    Type: Grant
    Filed: October 29, 1997
    Date of Patent: November 30, 1999
    Assignee: Messier-Bugatti
    Inventor: Jean Souetre
  • Patent number: 5990491
    Abstract: A channel forming region of a thin-film transistor is covered with an electrode and wiring line that extends from a source line. As a result, the channel forming region is prevented from being illuminated with light coming from above the thin-film transistor, whereby the characteristics of the thin-film transistor can be made stable.
    Type: Grant
    Filed: December 10, 1997
    Date of Patent: November 23, 1999
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Hongyong Zhang
  • Patent number: 5991245
    Abstract: A recording medium reproducing apparatus capable of accommodating a plurality of recorded media and exchanging a recorded medium even during the reproduction of another recorded medium, the apparatus being made easy to use. A stocker accommodates a plurality of recorded medium holders for holding a recording medium. A first transport unit transports the recorded medium holder between the inside of the stocker and the outside of an apparatus housing. A second transport unit transports the recorded medium holder between the inside of the stocker and a reproduction unit. The stocker is moved up and down in order to align the position of the recorded medium holder with the position of the first or second transport unit. When the recorded medium holder is transports from the outside of the housing to the inside of the stocker, a presence/absence of a recorded medium is detected by a light emitting unit and a light receiving unit.
    Type: Grant
    Filed: March 14, 1997
    Date of Patent: November 23, 1999
    Assignee: Kabushiki Kaisha Kenwood
    Inventor: Masaki Yoshimura
  • Patent number: 5985741
    Abstract: A method for improving the reliability and yield of a thin film transistor by controlling the crystallinity thereof. The method comprises the steps of forming a gate electrode on an island amorphous silicon film, injecting an impurity using the gate electrode as a mask, forming a coating film containing at least one of nickel, iron, cobalt, platinum and palladium so that it adheres to parts of the impurity regions, and annealing it at a temperature lower than the crystallization temperature of pure amorphous silicon to advance the crystallization starting therefrom and to crystallize the impurity regions and channel forming region.
    Type: Grant
    Filed: March 20, 1997
    Date of Patent: November 16, 1999
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Yasuhiko Takemura, Hongyong Zhang
  • Patent number: 5983857
    Abstract: An engine control system for an automobile engine of, for example, the type which injects fuel directly into an combustion chamber (16) and executes a fuel-cut control under a specified engine operating condition establishes a stratified charge combustion mode and a homogeneous charge combustion mode selectively according to engine operating conditions following termination of the fuel-cut control and shuts off nearly completely an engine throttle valve (28) during execution of the fuel-cut control and opens the engine throttle valve (28) so as to variably control an amount of intake air passing through an intake passage (24) into the combustion chamber (16) before the stratified charge combustion mode is established following termination of the fuel-cut control.
    Type: Grant
    Filed: February 10, 1998
    Date of Patent: November 16, 1999
    Assignee: Mazda Motor Corporation
    Inventors: Kiyotaka Mamiya, Michihiro Imada, Masayuki Tetsuno