Abstract: A method, apparatus, and system for providing accurate level shifting, residue multiplication, and sample-and-hold functions for ADCs, while eliminating capacitor mismatch as a source of ADC errors. An input signal is sampled onto a first capacitor, and the complemented input signal is sampled onto a second capacitor. The sampled input signal is provided to a first input terminal of a unity gain amplifier by controllably connecting the first capacitor between the amplifier output and the first input terminal. An inverted version of the sampled complemented input signal is level shifted and provided to the amplifier's second input terminal by controllably coupling the second capacitor between a selected level-shift voltage and the second input terminal. The sampled analog input signal is added to the inverted version of the sampled complemented analog input signal, while subtracting the selected level-shift voltage, to provide a residue signal available for use in subsequent conversion stages.