Abstract: Resist compositions having good footing properties even on difficult substrates are obtained by using a combination of base additives including a room temperature solid base, and a liquid low vapor pressure base. The compositions are especially useful on metal substrates such as chromium-containing layers commonly used in mask-making.

Abstract: A data receiver is provided which is operable to receive a signal controllably pre-distorted and transmitted by a transmitter, to generate information for adjusting the pre-distortion applied to the signal transmitted by the transmitter, and to transmit the information to the transmitter. The receiver is further operable to perform adaptive equalization to receive the signal transmitted by the transmitter.

Abstract: A positive photoresist composition comprises a radiation sensitive acid generator, and a polymer that includes a first repeating unit derived from a sulfonamide monomer including a fluorosulfonamide functionality, a second repeating unit having a pendant acid-labile moiety, and a third repeating unit having a lactone functionality. The positive photoresist composition may be used to form patterned features on a substrate, such as those used in the manufacture of a semiconductor device.

Abstract: A positive photoresist composition comprises a radiation sensitive acid generator, and a polymer that includes a first repeating unit derived from a sulfonamide monomer including a fluorosulfonamide functionality, a second repeating unit having a pendant acid-labile moiety, and a third repeating unit having a lactone functionality. The positive photoresist composition may be used to form patterned features on a substrate, such as those used in the manufacture of a semiconductor device.

Abstract: A method is provided for forming a stable thin film on a substrate. The method includes depositing a co-polymer composition having a first component and a second component onto a substrate to form a stable film having a first thickness. The first component has first dielectric properties not enabling the first component by itself to produce the stable film having the first thickness. However, the second component has second dielectric properties which impart stability to the film at the first thickness. In a preferred embodiment, the second component includes a leaving group, and the method further includes first thermal processing the film to cause a solvent but not the leaving group to be removed from the film, after which second thermal processing is performed to at least substantially remove the leaving group from the film. As a result, the film is reduced to a second thickness smaller than the first thickness, and the film remains stable during both the first and the second thermal processing.

Abstract: A method of designing an integrated circuit is provided in which the design layout is optimized using a process model until the design constraints are satisfied by the image contours simulated by the process model. The process model used in the design phase need not be as accurate as the lithographic model used in preparing the lithographic mask layout during data prep. The resulting image contours are then included with the modified, optimized design layout to the data prep process, in which the mask layout is optimized using the lithographic process model, for example, including RET and OPC. The mask layout optimization matches the images simulated by the lithographic process model with the image contours generated during the design phase, which ensures that the design and manufacturability constraints specified by the designer are satisfied by the optimized mask layout.

Abstract: A method of conveying the designer's intended electrical characteristics for a semiconductor design is provided by forming tolerance bands for a design layer of interest that take into consideration constraints from design layers that interact with and influence the features on the design layer of interest. The method determines regions, i.e. tolerance bands, within which the printed edges of features of the layer of interest will print within a predetermined criterion, and satisfy a variety of constraints, including, but not limited to, electrical, overlay and manufacturability constraints arising from the influence of features on other layers. The method may be implemented in a computer program product for execution on a computer system. The resulting tolerance bands can be used to efficiently convey the designer's intent to a lithographer, an OPC engineer or a mask manufacturer or tool.

Abstract: A method of testing connectivity through a plurality of dual purpose current mode logic (“CML”) latch circuits connected in a series is provided. Each of the CML latch circuits are operable to latch at least one output signal at a timing in accordance with at least one clock signal and having a mode control device for operating the CML latch circuit as a buffer amplifier when the at least one clock signal is inactive. The method comprises the steps of activating the mode control devices of each of the CML latches to operate each of the CML latches as a buffer; inputting a first signal to a first CML latch of the series; latching an output signal of a second CML latch of the series, the second CML latch being connected at a point in the series downstream from the first CML latch; and determining whether the output signal changes in accordance with a change in the first signal.

Abstract: A method is provided for forming a polysilicon layer on a substrate and aligning an exposure system with an alignment feature of the substrate through the polysilicon layer. In such method, a polysilicon layer is deposited over the substrate having the alignment feature such that the polysilicon layer reaches a first temperature. The polysilicon layer is then annealed with the substrate to raise the polysilicon layer to a second temperature higher than the first temperature. A photoimageable layer is then deposited over the polysilicon layer, after which an alignment signal including light from the alignment feature is received through the annealed polysilicon layer. Using the alignment signal passing through the annealed polysilicon layer from the alignment feature, an exposure system is aligned with the substrate with improved results.

Abstract: Compositions characterized by the presence of an aqueous base-soluble polymer having aromatic moieties and a refractive index value n of less than 1.5 with respect to a radiation wavelength of 193 nm have been found which are especially useful as top antireflective coatings in 193 nm dry lithographic processes. Polymers with an ethylenic backbone and having fluorine and sulfonic acid moieties have been found to be especially useful. The compositions enable top reflection control at 193 nm while providing ease of use by virtue of their solubility in aqueous alkaline developer solutions.

Abstract: A data receiver is provided which includes a front end interface circuit having an alternating current (AC) transmission receiving mode and a direct current (DC) transmission receiving mode. The front end interface circuit includes an offset compensation circuit operable to compensate a DC voltage offset between a pair of differential signals input to the data receiver. The front end interface circuit further includes an AC/DC selection unit operable to switch between (a) the DC transmission receiving mode, and (b) the AC transmission receiving mode, such that the data receiver is operable in (i) the DC transmission mode in which the offset compensation circuit is disabled, (ii) the DC transmission mode in which the offset compensation circuit is enabled, (iii) the AC transmission mode in which the offset compensation circuit is disabled, and (iv) the AC transmission receiving mode in which the offset compensation circuit is enabled.

Abstract: A method is provided for making a buried plate region in a semiconductor substrate. According to such method, a trench is a single-crystal semiconductor region of a substrate is etched to form a trench elongated in a direction extending downwardly from a major surface of the substrate. A dopant source layer is formed to overlie a lower portion of the trench sidewall but not an upper portion of the trench sidewall. A layer consisting essentially of semiconductor material is epitaxially grown onto a single-crystal semiconductor region exposed at the upper portion of the trench sidewall above the dopant source layer. Through annealing, a dopant is then driven from the dopant source layer into the single-crystal semiconductor material of the substrate adjacent to the lower portion to form a buried plate. Then, the dopant source layer is removed and an isolation collar is formed along at least a part of the upper portion.

Abstract: The image sensing device interface unit attached to an image sensing device has dedicated means to detect a complete missing line and to perform clock gating of circuits for power management self-optimization. For each image frame, the time interval between start of line 1 and start of line 2 is computed and stored in a first register. The time interval between any other pair of two consecutive lines is also computed and stored in a second register. The stored values are compared, and if the value in the second register is greater than in the first register, a complete missing line has been detected and the gated clock used in said circuits is switched off for power saving. The interface unit can adapt to any type of sensor and does not require the help of any processor to perform the power saving function.

Abstract: A circuit of testing an analog driver circuit using digital scan-based test methodologies. The circuit of the present invention includes a control circuit for generating signals in response to a test enable signal, a differential driver circuit for receiving a differential input signal, amplifying the differential input signal and transmitting a differential output signal in response to the differential input signal and the signals generated by the control circuit, a programmable termination impedance circuit for generating a differential termination impedance at the output node of the differential driver circuit in response the signals generated by the control circuit, and a differential receiver circuit for receiving the differential output from the differential driver circuit, convert the differential output signal to a single ended signal and transmitting the single ended signal, all in response to the test enable signal.

Abstract: A method of forming a memory cell having a trench capacitor and a vertical transistor in a semiconductor substrate includes a step of providing a bonded semiconductor wafer having a lower substrate with an [010] axis parallel to a first wafer axis and an upper semiconductor layer having an [010] axis oriented at forty-five degrees with respect to the wafer axis, the two being connected by a layer of bonding insulator; etching a trench through the upper layer and lower substrate; enlarging the lower portion of the trench and converting the cross section of the upper portion of the trench from octagonal to rectangular, so that sensitivity to alignment errors between the trench lithography and the active area lithography is reduced. An alternative version employs a bonded semiconductor wafer having a lower substrate formed from a (111) crystal structure and the same upper portion.

Abstract: A new underlayer composition that exhibits high etch resistance and improved optical properties is disclosed. The underlayer composition comprises a vinyl or acrylate polymer, such as a methacrylate polymer, the polymer comprising at least one substituted or unsubstituted naphthalene or naphthol moiety, including mixtures thereof. Examples of the polymer of this invention include: where each R1 is independently selected from an organic moiety or a halogen; each A is independently a single bond or an organic moiety; R2 is hydrogen or a methyl group; and each X, Y and Z is an integer of 0 to 7, and Y+Z is 7 or less. The organic moiety mentioned above may be a substituted or unsubstituted hydrocarbon selected from the group consisting of a linear or branched alkyl, halogenated linear or branched alkyl, aryl, halogenated aryl, cyclic alkyl, and halogenated cyclic alkyl, and any combination thereof.

Abstract: In a telecommunication system adapted to exchange n-bit frames according to a dynamic time division multiplexing access method for a maximum of N accessible channels, the use of a shadow time slot assignment table is eliminated by use of a circuit that includes (a) an n×p memory block to store a time slot assignment table which describes the different time slot assignments by specifying which logical channel each bit position of an n-bit frame belongs to, (b) a register having N fields with a granularity of one bit, each bit indicates the status of the corresponding logical channel associated thereto, and (c) a logic circuit connected to the memory block and register that enables or disables the transmission of the logical channel identifier to a time slot assignor depending on the status bit value.

Abstract: A data receiver is provided which is operable to receive a signal controllably pre-distorted and transmitted by a transmitter, to generate information for adjusting the pre-distortion applied to the signal transmitted by the transmitter, and to transmit the information to the transmitter. The receiver is further operable to perform adaptive equalization to receive the signal transmitted by the transmitter.

Abstract: The negative resist compositions especially suitable for electron beam-based lithographic processes are obtained by using a polymeric component containing first silsesquioxane moieties functionalized with a first reactive group having a first crosslinking reactivity and a first dissolution rate in aqueous alkaline solutions, and second silsesquioxane moieties functionalized with a second reactive group having a second crosslinking reactivity and a second dissolution rate in aqueous alkaline solutions, said reactivities being different from one another and said dissolution rates being different from one another. These negative resists enable improved negative lithographic processes, especially in the context of mask-making and direct-write techniques using electron beam lithography. The negative resists are also useful more generally in methods of forming patterned material features and advantageously show reduced incidence of image collapse at smaller groundrules.

Abstract: A signal regenerator is provided which includes a common mode reference generator and a signal converter circuit. A common mode reference voltage level is generated which is variable in relation to at least one of a process used to fabricate the common mode reference generator, a level of a power supply voltage provided to the common mode reference generator or a temperature at which the common mode reference generator is operated. A signal converter circuit receives a differentially transmitted signal pair including a first input signal and a second input signal and outputs a single-ended output signal representing information carried by the differentially transmitted signal pair. Using a feedback signal from the common mode reference generator, a feedback control block controls a common mode level of the single-ended output signal in accordance with the common mode reference voltage level.