Patents Represented by Attorney, Agent or Law Firm Suiter & Associates
  • Patent number: 6504413
    Abstract: The present invention is directed to a buffer improvement for higher speed operation. A buffer may include at least two buffer stages, which may include a first buffer stage and a second buffer stage. A voltage conversion circuit is disposed between the first buffer stage and the second buffer stage. The voltage conversion circuit is suitable for acting as a delay between the first buffer stage and the second buffer stage. Additionally, the first buffer stage may be driven directly, thereby increasing buffer speed.
    Type: Grant
    Filed: March 21, 2001
    Date of Patent: January 7, 2003
    Assignee: Cypress Semiconductor Corp.
    Inventor: Colin Davidson
  • Patent number: 6504138
    Abstract: A media scanner scans information disposed on a media such as a business card or envelope. The media scanner requires no moving parts and may be incorporated in a portable, hand held, battery powered information handling system such as an electronic address book or personal digital assistant. The scanner includes a scanning element such as a linear CCD element for scanning the information stored on the medium, which is converted into a graphical image or text file. As the medium is fed past the scanning element, a detector detects the movement of the medium as the medium is fed through the scanner. Any variation of the movement of the medium, for example due to inconsistent movement or pausing caused by hand scanning, etc., is detected by detector, and scanning is executed according to the detected movement so that optimal scanning is maintained.
    Type: Grant
    Filed: October 1, 2001
    Date of Patent: January 7, 2003
    Assignee: Gateway, Inc.
    Inventor: Mark M. Mangerson
  • Patent number: 6502230
    Abstract: The present invention is directed to a system and method of modeling electrical circuits. The present invention may provide improved software for predicting microchip interconnect delays, and in general for an improved semiconductor manufacturing models. Further, the invention may provide for accurate prediction of resistance, capacitance and inductance for interconnections in a semiconductor, allowing for both environmental values and process variations.
    Type: Grant
    Filed: May 2, 2001
    Date of Patent: December 31, 2002
    Assignee: LSI Logic Corporation
    Inventors: Stefan Graef, Sheela Shreedharan
  • Patent number: 6497368
    Abstract: A portable data collection system employing a portable data terminal having increased functionality is disclosed. The portable data terminal includes an integral magnetic stripe reader for reading information magnetically encoded on a magnetic stripe card, such as a credit card or the like. An interchangeable feature pod may be attachable to the data terminal and may include a selected data collection or communication device such as, for example, a data communication port, optical indicia reader or laser scanner to facilitate data entry and communication. The interchangeable feature pod may include a compact, ergonomically efficient actuator for activating the selected data collection or communication device. Interconnection of the portable data terminal to interchangeable feature apparatus such as an electrical power supply, peripheral devices, or data communication apparatus may be accomplished via separate line connection, a port replication apparatus or a vehicle docking apparatus.
    Type: Grant
    Filed: January 19, 1999
    Date of Patent: December 24, 2002
    Assignee: Intermec IP Corp.
    Inventors: Steven D. Friend, Kurt Kordes, Dennis Silva
  • Patent number: 6499091
    Abstract: The present invention is directed to a system and method for synchronizing data between mirrored subsystems. A method for storing data may include receiving data suitable for storage to a first storage device and a second storage device, wherein the first storage device and the second storage device are mirrored. A map is created including at least one map entry having an identifier suitable for describing a range of addressable data blocks, wherein the map entry corresponds to a data block modified after operation of the first storage device is suspended. A map is stored including the at least one map entry on the second storage device, wherein the map is suitable for being utilized to restore data stored on the second storage device to at least one of the first storage device and a third storage device.
    Type: Grant
    Filed: November 13, 2000
    Date of Patent: December 24, 2002
    Assignee: LSI Logic Corporation
    Inventor: James R. Bergsten
  • Patent number: 6498999
    Abstract: A simulation test bench environment for testing a circuit is described. The test bench environment uses high-level task routines executed by one or more bus functional device models to generate input test vectors. A timing and protocol checker verifies both signal timing and functional operation bus specifications. Data and parity miscompares and corruptions are reported in real-time during simulation. An error and interrupt handler services errors and interrupts by communicating with the buses coupled to the circuit to execute specific recovery routines. A memory model is used to generate known expected data for data transactions, to store data from the circuit on data transactions, and to generate operation codes for the circuit.
    Type: Grant
    Filed: July 24, 2000
    Date of Patent: December 24, 2002
    Assignee: LSI Logic Corporation
    Inventor: Brian G. Reise
  • Patent number: 6496374
    Abstract: The present invention is directed to an apparatus suitable for mounting an integrated circuit (IC) including a frame suitable for receiving an integrated circuit (IC). The frame includes at least one leg coupled to the frame, the leg suitable for engaging a circuit board so as to enable the apparatus to be secured to the circuit board, thereby securing the integrated circuit (IC). At least one of the frame and leg include a conductive material so as to create at least one of a heat conducting path and an EMC ground path between the integrated circuit (IC) and the circuit board.
    Type: Grant
    Filed: October 24, 2000
    Date of Patent: December 17, 2002
    Assignee: LSI Logic Corporation
    Inventor: Barry Caldwell
  • Patent number: 6489589
    Abstract: The present invention teaches various femtosecond machining and drilling apparatus and processes for fabricating tools and the like from both traditional and non-traditional materials. Also described are novel tools such as scalpels, and nozzles fabricated from the apparatus and processes of the present invention. Likewise, the present invention may be utilized in both a novel propulsion system and the production of materials formed from nanometer sized particles and the like.
    Type: Grant
    Filed: March 5, 1998
    Date of Patent: December 3, 2002
    Assignee: Board of Regents, University of Nebraska-Lincoln
    Inventor: Dennis R. Alexander
  • Patent number: 6487819
    Abstract: A weather strip for use on a vehicle comprises an engaging portion for securing a weather strip to a vehicle and a weather strip body comprising a compressible portion and a magnetic sealing portion. The magnetic sealing portion provides a seal acting in a direction projecting toward a magnetically attractive substrate to provide a sealing interference between the magnetic sealing portion and the substrate when the weather strip is installed on the vehicle and a door closes the opening. The weather strips described herein provide an air and water tight seal without requiring a high compression force, thus improving door operation and reducing closing noise by eliminating the need to slam the door.
    Type: Grant
    Filed: July 18, 2000
    Date of Patent: December 3, 2002
    Assignee: Meritor Light Vehicle Technology L.L.C
    Inventors: Ira B. Goldberg, Patricia Cunningham, Timothy X. Bland, Gurbinder S. Kalsi
  • Patent number: 6487677
    Abstract: Methods and associated systems using probabilistic methods for selecting among a plurality of diagnostic procedures to recover from an error condition in a managed device. Operation of a managed device is overseen by a management device. A management client process operable within the management device communicates with a management service operable within the managed device. Upon detection of an error condition within the managed device, the management service propagates an event to the management client so indicating an error condition. The management client in the management device responds to the event by requesting the managed device to determine the best options for recovery procedures. The managed device then computes a probability of success for each known recovery procedure based upon the present state of the managed device and based upon past successes or failures of recovery procedures for particular error conditions.
    Type: Grant
    Filed: September 30, 1999
    Date of Patent: November 26, 2002
    Assignee: LSI Logic Corporation
    Inventors: Ray M. Jantz, Matthew A. Markus
  • Patent number: 6486712
    Abstract: A programmable switch includes at least one or more pass transistors having a control voltage that is greater than the data path reference voltage that is selected by a corresponding pass transistor. The control voltage is provided by a higher voltage power supply than the power supply that provides the data path reference voltage. In one embodiment, the higher voltage supply is a quiet supply that is not loaded with devices that switch during normal operation of the programmable switch such as CMOS devices. In another embodiment, the power supply that provides a voltage to an I/O circuit of the probable switch is the power supply that is utilized to provide the control voltage to the pass transistors. In a particular embodiment, the pass transistors comprise higher voltage tolerant devices than other devices in the programmable device. In a particular embodiment, the higher voltage supply is at least the data path reference voltage plus the threshold voltage of the pass transistors.
    Type: Grant
    Filed: December 18, 2000
    Date of Patent: November 26, 2002
    Assignee: Cypress Semiconductor Corp.
    Inventors: Greg J. Landry, Robert M. Reinschmidt, Timothy M. Lacey
  • Patent number: 6487463
    Abstract: A system for actively cooling an electronic device is disclosed. The electronic device may be divided into a plurality of regions each containing one or more electrical or electronic components. A temperature sensor is positioned in each region to sense the temperature of the components contained in that region. Similarly, a temperature regulating device is positioned in each region. A controller monitors the temperature of each region as sensed by the temperature sensor and adjusts the amount of cooling provided to that region by the temperature regulating device, accordingly.
    Type: Grant
    Filed: June 8, 1998
    Date of Patent: November 26, 2002
    Assignee: Gateway, Inc.
    Inventor: George Thomas Stepp, III
  • Patent number: 6487692
    Abstract: A Reed-Solomon decoder capable of correcting two symbol errors in a codeword of a Reed-Solomon RS(128,122,7) code over a Galois field GF(128) is provided. In an exemplary embodiment, the Reed-Solomon decoder is suitable for use in cable modems with little or no loss in error performance over Reed-Solomon decoder correcting three errors in a codeword.
    Type: Grant
    Filed: December 21, 1999
    Date of Patent: November 26, 2002
    Assignee: LSI Logic Corporation
    Inventor: Robert Morelos-Zaragoza
  • Patent number: D466778
    Type: Grant
    Filed: October 23, 2001
    Date of Patent: December 10, 2002
    Assignee: DeVilbiss Air Power Company
    Inventor: Fred M. Morgan
  • Patent number: D467149
    Type: Grant
    Filed: November 8, 2001
    Date of Patent: December 17, 2002
    Assignee: DeVilbiss Air Power Company
    Inventor: Fred M. Morgan
  • Patent number: D467692
    Type: Grant
    Filed: February 19, 2002
    Date of Patent: December 24, 2002
    Assignee: DeVilbiss Air Power Company
    Inventors: Fred M. Morgan, Robert F. Burkholder, Allen Palmer
  • Patent number: D467782
    Type: Grant
    Filed: October 23, 2001
    Date of Patent: December 31, 2002
    Assignee: DeVilbiss Air Power Company
    Inventor: Fred M. Morgan
  • Patent number: D468173
    Type: Grant
    Filed: October 3, 2001
    Date of Patent: January 7, 2003
    Assignee: DeVilbiss Air Power Company
    Inventor: Fred M. Morgan
  • Patent number: D468174
    Type: Grant
    Filed: October 3, 2001
    Date of Patent: January 7, 2003
    Assignee: DeVilbiss Air Power Company
    Inventor: Fred M. Morgan
  • Patent number: D468175
    Type: Grant
    Filed: October 3, 2001
    Date of Patent: January 7, 2003
    Assignee: DeVilbiss Air Power Company
    Inventor: Fred M. Morgan