Abstract: A tactile pick includes a base and a lever attached beneath the base by a pivot. A load sensing device including a strain gauge is located between the base and the portion of the lever on one side of the pivot; the portion of the lever on the other side of the pivot is adapted to receive a semiconductor wafer. Rotation of the lever about the pivot induced by the weight of a wafer causes an actuator to depress a flexible member on which a strain gauge is mounted. The output signal of the strain gauge is processed by a controller to provide an output signal which varies monotonically with the magnitude of the weight placed on the wafer receiving portion of the lever. The pick is employed in connection with the wafer transport system which transfers wafers from a cassette to the pick lever.

Abstract: Method and apparatus for locating the centroid along a line section of an ion beam in a vacuum chamber, requiring no moving parts and requiring only two electrical conductors passing through the wall of the vacuum chamber. An array of Faraday cup current sensors is positioned along a line in the path of the beam at predetermined distances from a reference point, so that each sensor intercepts a component of the beam. A first plurality of resistors each has one end connected to one of the beam current sensors, has a value proportional to the distance between the beam current sensor to which it is connected and the reference point, and has its other end connected to a first common point. A second plurality of resistors having values equal to each other each has one end connected to one of the beam current sensors, has a value much greater than the largest of the first plurality of resistors, and has its other end connected to a second common point.

Abstract: A platen and beam setup assembly for use in an ion implanter includes a platen for wafer mounting and a beam setup flag for beam measurement. The platen and the setup flag are angularly displaced with respect to a common mounting shaft perpendicular to the ion beam. The assembly can be rotated about the shaft between a first position wherein the wafer is exposed to the ion beam and a second position wherein the setup flag is exposed to the ion beam. In a preferred embodiment, the platen is positioned for wafer exchange when the setup flag is exposed to the ion beam.

Abstract: A modular wafer processing system requires a gate valve of minimum thickness. A gate valve is provided in which the gate is an assymetric wedge on an assymetrically mounted drive shaft.

Abstract: A logarithmic rf amplifier includes a plurality of cascaded stages each including a differential amplifier which performs full-wave rectification of the rf signal and a circuit for providing a video signal representative of the full-wave rectified rf signal. The logarithmic amplifier further includes a circuit for supplying rf signals of equal amplitude and opposite polarity to the inputs of the first differential amplifier stage and a circuit for summing the video signals from each of the stages and providing a logarithmic video output. The amplifier exhibits extremely fast pulse response and clean limiting.

Abstract: A ferromagnetic film for magnetic recording comprises a copper substrate having particles of iron and iron oxides dispersed in the surface layer of the copper. The particles have maximum dimensions in the range between 50 and 500 Angstroms. The ferromagnetic film can be formed by ion implantation of iron ions into the copper substrate followed by heat treatment to permit growth of ferromagnetic particles to the desired size. As an alternative to ion implantation, the iron can be deposited on the copper substrate by sputtering or evaporation and mixed with the copper by ion beam mixing.

Abstract: Apparatus for thermal transfer with a semiconductor wafer in a vacuum processing chamber includes a platen with a surface for supporting the wafer, a clamping ring for clamping the wafer to the platen, and passages for supplying a low pressure gas into a thermal transfer region between the wafer and the platen surface. A low compliance seal surrounds the thermal transfer region and inhibits the gas from reaching the processing chamber without overstressing the wafer. The seal includes an elastomer ring having an elongated cross-section, and a sealing groove having a first groove portion for gripping one edge of the ring and a second groove portion which receives the other edge of the ring by bending deformation thereof when a wafer is clamped to the platen. In a preferred embodiment, the ring has a parallelogram-shaped cross-section and is oriented at an acute angle to the platen surface.

Abstract: A machine for sputter deposition of a wafer workpiece also sputters on the wafer supporting mechanism. This causes a need for cleaning or replacement of the support mechanism. A sputter machine is provided in which the supporting mechanism can be isolated from the sputtering source, the pumps and other processing apparatus for cleaning without exposing the entire machine to atmosphere.

Abstract: Normal or constant angle scanning of a target with high current ion beam is provided by positioning a space charge lens between a beam deflection system and the target. The space charge lens is positioned such that its focal point coincides with the virtual center of deflection. The space charge lens steers the scanned beam into parallel paths so as to maintain a constant angle of incidence upon the workpiece. In an electrostatic deflection system, two sets of y-axis deflection plates can be axially positioned on opposite sides of the x-axis deflection plates to provide a single virtual center of deflection. The apparatus is useful for performing ion implantation with higly uniform dose distribution.

Abstract: Test circuitry is included in a PROM memory for detecting shorts between bit lines and word lines and shorts or leaks in a memory cell. The circuitry enables a selected positive voltage to be applied across all memory cells in the memory so that the existance of leaky memory cells or shorts in the memory can be detected during testing. The test circuitry has no appreciable effect on the memory during normal operation of the memory.

Abstract: A high-voltage bi-directional analog switch is implemented using a pair of MOS depletion type transistors having their sources connected together and having their gates connected together. The drains constitute the high voltage input port and the high voltage output port. The switch conducts so long as the voltage on the common gate connection relative to the voltage on the common source connection is more positive that the pinch-off voltage. The source-to-gate voltages are controlled by a means including an enhancement mode transistor. Voltage level shift means are provided to shift low level logic signals to a sufficiently high level to control conductance through said enhancement mode transistor. The source of voltage rails need not provide two high voltages but at most only a single high voltage level is required.

Abstract: A pulse width digital to analog converter is constructed which provides an output clock rate that is a multiple of the input sampling rate. In one embodiment a latch is used to store N-bit digital word representing the analog signal value to be generated. (N-K) of the most significant bits are stored in a counter which decrements its count in response to a clock signal. A plurality of least significant bits of said digital word stored in said latch are applied to a logic circuit. A ring counter is utilized to indicate which section of the output signal is currently being generated.

Abstract: Interface circuitry is provided for interconnecting a source of positional data such as a touch tablet with a computer interface. The circuitry acquires voltages from the source of positional data which represent the data. An acquired voltage is compared with a ramped voltage. At the time of crossover the internal capacitor of the computer interface is rapidly charged above the threshold level to provide positional data from the external source to the computer interface.

Abstract: A CMOS semiconductor structure having insulation sidewall spacers whose width is selected independently for NMOS and PMOS devices. The width of the spacer is selected to reduce hot electron injection in the N channel device and to insure that the gate and source regions are aligned with or underlap the gate in the P channel device. A narrower spacer is used for the P channel device than for the N channel device which permits the formation of a P channel device having a threshold voltage less than 1 volt.

Abstract: A fall-through memory array comprising in a plurality of rows and columns a plurality of memory cells, each memory cell comprising a pair of cross-coupled transistors having three emitters, a collector and a base. Control potentials applied to a word line, coupled to each one of two of the emitters of each of the transistors, control the transfer of data bits from one row of such memory cells to another.

Abstract: An MOS transistor which is suitable for use in the VHF and UHF regions is fabricated in a semiconductor substrate, with the substrate serving as the drain. A body region is formed within the substrate. A layer of insulation is formed over the surface of the device, and a via is formed in the insulation layer to expose those portions of the body region where a groove is to be cut. A groove is then formed in such a manner as to cause the insulation layer to overhang the edge of the groove. A source region is then formed in the exposed portions of the body region beneath the insulation layer. A source electrode and gate electrode are then simultaneously formed, with the overhang of the insulation layer causing the source electrode and the gate electrode to be physically and electrically separated from each other. Well known processing techniques are then used, if desired, to form a second metalization layer to serve as electrical interconnects, and to provide a scratch protection layer.

Abstract: A system and procedure for organizing a digital memory by incorporating error correcting circuitry and error detecting circuitry into the memory based on the graph of an error-correcting code in tree form. The error detecting circuitry detects a variety of multiple errors in stored binary bits, and in addition detects certain failures in the memory circuitry. One embodiment coordinates a series of independent memory subarrays in an interdependent manner so that all of the bits in an arbitrarily large memory are organized so as to form several long code words in a single-error-correcting double-error-detecting code. Another embodiment organizes all of the bits in the memory so that they form a single codeword in a double-error-correcting, triple-error-detecting code derived from a projective plane. Coding efficiency is high: in the cases of a 256K memory, including the required parity check bits, only (33/32) 256K bits, approximately, must be stored.

Abstract: An adjusting means for a microscope objection (51a) or the like is provided comprising a fixed support (53), a piezomotor (52) having an output ram (54) capable of accurate incremental movement and which is adapted to strike a flexible leg or lever (55) which amplifies the incremental ram movement. The cantilevered end (57) of leg (55) moves arcuately to strike a second oppositely extending lever (60) which is journalled in a flexure pivot (61). Lever (60) extends back toward the objective (50a) and further accurately amplifies the incremental ram movement so as to move the objective a finite distance based on electrical inputs to the piezomotor.

Abstract: A stepped piston for an engine of the kind having one or more cylinders, the or each cylinder containing a stepped piston having a pumping part of larger diameter, and a working part of smaller diameter, the working part of the piston being slidable in, and associated with, a working part of the cylinder in which combustion of a fuel/air mixture takes place, and the pumping part of the piston being slidable in, and associated with, a pumping part of the cylinder, the piston having a body with an interior hollow opening to the outside of a lower end of the piston, the body comprising a smaller diameter working, part, extending from the top of the piston to a step, and a larger diameter, pumping, part extending from the step to a lower end of the piston, at least one piston ring groove formed in an outer surface of the smaller diameter part and at least one piston ring groove formed in the outer surface of the larger diameter part, each piston ring groove, in use, receiving a piston ring the smaller diameter pa

Abstract: An exercise apparatus is provided which includes a partially threaded receptacle and a handle attached to a selectively rotatable partially threaded rod. The partially threaded rod enables a user to selectively slide the rod into or out of the receptacle or lock the rod in the receptacle in order to perform stretching and pulling exercises in a controlled manner.