Patents Represented by Attorney The Caldwell Firm, LLC
  • Patent number: 8005777
    Abstract: A decision making system, method and computer program product are provided. Initially, a plurality of attributes is defined. Thereafter, first information regarding the attributes is received from a receiving business. Second information is then received regarding proposed products or services in terms of the attributes. Such second information is received from a supplying business. In use, a decision process is executed based on the first information and the second information.
    Type: Grant
    Filed: July 27, 2010
    Date of Patent: August 23, 2011
    Assignee: Aloft Media, LLC
    Inventors: Daniel L. Owen, Michael W. Kusnic
  • Patent number: 8006152
    Abstract: A method comprises generating a test pattern for a device under test (DUT), wherein the DUT comprises a plurality of scan chains coupled to a plurality of multiple input shift registers (MISRs). The plurality of faults detected by a first MISR and by a second MISR are identified. In the event the plurality of faults detected by the first MISR does not include any of the plurality of faults detected by the second MISR and the plurality of faults detected by the second MISR does not include any of the plurality of faults detected by the first MISR, the first MISR and the second MISR are coupled as an independent MISR pair. The test pattern is applied to the DUT to generate a scan chain output. The independent MISR pair captures the scan chain output to generate a test signature. The test signature is compared with a known good signature.
    Type: Grant
    Filed: January 12, 2009
    Date of Patent: August 23, 2011
    Assignee: International Business Machines Corporation
    Inventors: Samuel I. Ward, Patrick R. Crosby, William D. Ramsour, Bao G. Truong
  • Patent number: 7987399
    Abstract: A test card system for use in product development includes a device under test (DUT). The DUT comprises: a mount plane; a power input port coupled to the mount plane; a JTAG input port coupled to the mount plane; a clock signal distribution network coupled to the JTAG input port; a plurality of latches coupled to the clock signal distribution network and the power input port; and an output port coupled to the plurality of latches. A test card (TC) couples to the DUT, comprising: a JTAG interface coupled to the DUT JTAG input port and configured to provide test data to the DUT; a clock module coupled to the DUT clock signal distribution network and configured to generate a clock signal; and an analysis module coupled to the DUT output port and configured to receive data from the DUT.
    Type: Grant
    Filed: June 6, 2007
    Date of Patent: July 26, 2011
    Assignee: International Business Machines Corporation
    Inventors: Richard Dono, Roger D. Weekly
  • Patent number: 7979098
    Abstract: A wireless network (100) includes a communications node (120) configured to periodically generate and transmit at least one reception definition. Each reception definition indicates a time and manner in which the node will operate to receive information messages.
    Type: Grant
    Filed: August 6, 2009
    Date of Patent: July 12, 2011
    Assignee: Tri-County Excelsior Founation
    Inventor: Brig Barnum Elliott
  • Patent number: 7979096
    Abstract: A system for conserving energy in a multi-node network (110) includes nodes (205) configured to organize themselves into tiers (305, 310, 315). The nodes (205) are further configured to produce a transmit/receive schedule at a first tier (310) in the network (110) and control the powering-on and powering-off of transmitters and receivers in nodes (205) in a tier adjacent (315) to the first tier (310) according to the transmit/receive schedule.
    Type: Grant
    Filed: October 16, 2008
    Date of Patent: July 12, 2011
    Assignee: Tri-County Excelsior Foundation
    Inventors: Brig Barnum Elliott, David Spencer Pearson
  • Patent number: 7975194
    Abstract: A system comprises a decompressor that receives an input test vector and generates an output vector in response to the input test vector. A decoder couples to the decompressor and comprises a reset pattern detector (RPD), a lookup table, and control logic. RPD scans the output vector to identify a predetermined reset pattern. The control logic couples to the RPD and the lookup table and directs operation of the lookup table in a first or second mode based on whether the output vector comprises the predetermined reset pattern, as identified by the RPD. The lookup table receives the output vector, to operate in the first mode, storing one of a plurality of codeword sets, each codeword set comprising a plurality of pairs of codewords and associated data; and to operate in the second mode, generating test data blocks in response to identified codewords in the output vector.
    Type: Grant
    Filed: April 23, 2007
    Date of Patent: July 5, 2011
    Assignee: International Business Machines Corporation
    Inventor: Samuel I. Ward
  • Patent number: 7970722
    Abstract: A decision making system, method and computer program product are provided. Initially, a plurality of attributes is defined. Thereafter, first information regarding the attributes is received from a receiving business. Second information is then received regarding proposed products or services in terms of the attributes. Such second information is received from a supplying business. In use, a decision process is executed based on the first information and the second information.
    Type: Grant
    Filed: November 9, 2009
    Date of Patent: June 28, 2011
    Assignee: Aloft Media, LLC
    Inventors: Daniel L. Owen, Michael W. Kusnic
  • Patent number: 7953599
    Abstract: A media player system, method and computer program product are provided. In use, an utterance is received. A command for a media player is then generated based on the utterance. Such command is utilized for providing wireless control of the media player.
    Type: Grant
    Filed: April 16, 2008
    Date of Patent: May 31, 2011
    Assignee: Stragent, LLC
    Inventors: Mark Greene, Michael Hegarty, Dermot Cantwell
  • Patent number: 7930610
    Abstract: A system comprises a circuit analysis module configured to analyze a device under test (DUT), the DUT comprising a plurality of latches coupled together in a scan chain. The circuit analysis module analyzes a DUT for sub-circuits within the DUT and identifies a logical description of identified sub-circuits. A don't-care analysis module couples to the circuit analysis module identifies absolute don't-care latches associated with the identified sub-circuits. A sub-circuit exception module couples to the circuit analysis module and selects weighted input values for an identified sub-circuit, based on the identified absolute don't-care latches and the logical description of the identified sub-circuit. The sub-circuit exception module stores the selected weighted input values for the sub-circuit and associates the selected weighted input values with the logical description.
    Type: Grant
    Filed: September 9, 2008
    Date of Patent: April 19, 2011
    Assignee: International Business Machines Corporation
    Inventors: Samuel I. Ward, Benjiman L. Goodman, Joshua P. Hernandez, Linton B. Ward, Jr.
  • Patent number: 7925948
    Abstract: A system comprises a circuit analysis module configured to analyze a device under test (DUT), the DUT comprising a plurality of latches coupled together in a scan chain. A don't-care analysis module identifies absolute don't-care latches within the DUT, assigns a weighted value to the bit positions of identified don't-care latches, and identifies absolute don't-care bits within a general test pattern. The circuit analysis module replaces identified absolute don't-care bits in the general test pattern according to the weighted value of the associated bit position, generating a weighted test pattern. A test vector module generates a test vector based on the weighted test pattern and an input module applies the test vector to the DUT.
    Type: Grant
    Filed: September 9, 2008
    Date of Patent: April 12, 2011
    Assignee: International Business Machines Corporation
    Inventors: Samuel I. Ward, Benjiman L. Goodman, Joshua P. Hernandez, Linton B. Ward, Jr.
  • Patent number: 7900922
    Abstract: A machine cabinet system is provided. The system includes a machine cabinet with a top face and a front face. In one embodiment, a removable panel is included that is removably coupled to at least one of the top face and the front face of the machine cabinet. In another embodiment, the removable panel is removably coupled to the machine cabinet without use of a tool.
    Type: Grant
    Filed: September 26, 2007
    Date of Patent: March 8, 2011
    Assignee: Stragent, LLC
    Inventor: Chester L. Mallory
  • Patent number: 7895490
    Abstract: A method for testing an electronic circuit comprises selecting a plurality of test patterns arranged in an order. The method tests an electronic circuit by applying to the electronic circuit a first subset range of the plurality of test patterns sequentially in the order, from a first test pattern to a first log interval after the first test pattern, thereby generating a first associated output. The method compares the first associated output with a first known output of the plurality of known outputs. In the event the first associated output does not match the first known output, the method stores indicia of the first mismatch; causes the electronic circuit to appear to assume the first known output state; and proceeds with additional test procedures.
    Type: Grant
    Filed: May 20, 2008
    Date of Patent: February 22, 2011
    Assignee: International Business Machines Corporation
    Inventors: Benjamin Robert Gass, Abel Alaniz, Asher Shlomo Lazarus, Timothy M. Skergan
  • Patent number: 7890690
    Abstract: A method for emulating a dual-port I2C device includes monitoring a bus for I2C traffic. A system receives an I2C interrupt on the bus. The system determines whether the received I2C interrupt is one of either a hardware interrupt or a software interrupt. In the event the received I2C interrupt is a hardware interrupt, the system responds to the hardware interrupt, and accesses a flash memory for read/write operation based on the hardware interrupt. In the event the received I2C interrupt is a software interrupt, the system responds to the software interrupt, and accesses a flash memory for read/write operation based on the software interrupt.
    Type: Grant
    Filed: June 7, 2007
    Date of Patent: February 15, 2011
    Assignee: International Business Machines Corporation
    Inventors: Kaveh Naderi, Patrick Allen Buckland, Jason Eric Moore, Abel Enrique Zuzuarregui
  • Patent number: 7870515
    Abstract: A method for hierarchical analysis of electronic circuits comprises selecting a first one of a plurality of abstraction levels of a general design model (GDM). The GDM comprises a first design description of electronic circuits at a plurality of abstraction levels and a plurality of foci, organized into sub-blocks. The method selects a first focus of the plurality of foci to select a first sub-block. The method identifies incomplete electronic circuits in the selected first sub-block. The method generates a second design description of the first sub-block to exclude identified incomplete electronic circuits, wherein the second design description is suitable for electronic design analysis (EDA). The method stores the generated second design description for subsequent use. Subsequent iterations thereby include all components of circuits that were incomplete in prior iterations.
    Type: Grant
    Filed: January 11, 2008
    Date of Patent: January 11, 2011
    Assignee: International Business Machines Corporation
    Inventors: Philip G. Shephard, III, Ravichander Ledalla, Vasant Rao, Jeffrey P. Soreff
  • Patent number: 7856472
    Abstract: A computer program assists in the completion of text input provided by a user. For example, the computer program may maintain a list of n-tuples (where n>1), each of which includes n text strings. For example, each n-tuple may include a stock ticker symbol and the name of a company having that stock ticker symbol. As the user types each character, the program determines whether the text typed by the user so far matches any of the text strings in the n-tuples. The program provides the user with an indication of whether any matches have been found, such as by displaying a list of the n-tuples having text matching the text typed by the user so far. The program then allows the user to select one of the matching n-tuples. The program uses text (such as a stock ticker symbol) from the user's selection to complete the text input.
    Type: Grant
    Filed: December 12, 2008
    Date of Patent: December 21, 2010
    Assignee: Aloft Media, LLC
    Inventor: Gal Arav
  • Patent number: 7849148
    Abstract: A computer program assists in the completion of text input provided by a user. For example, the computer program may maintain a list of n-tuples (where n>1), each of which includes n text strings. For example, each n-tuple may include a stock ticker symbol and the name of a company having that stock ticker symbol. As the user types each character, the program determines whether the text typed by the user so far matches any of the text strings in the n-tuples. The program provides the user with an indication of whether any matches have been found, such as by displaying a list of the n-tuples having text matching the text typed by the user so far. The program then allows the user to select one of the matching n-tuples. The program uses text (such as a stock ticker symbol) from the user's selection to complete the text input.
    Type: Grant
    Filed: December 12, 2008
    Date of Patent: December 7, 2010
    Assignee: Aloft Media, LLC
    Inventor: Gal Arav
  • Patent number: 7836257
    Abstract: A method for managing a cache operates in a data processing system with a system memory and a plurality of processing units (PUs). A first PU determines that one of a plurality of cache lines in a first cache of the first PU must be replaced with a first data block, and determines whether the first data block is a victim cache line from another one of the plurality of PUs. In the event the first data block is not a victim cache line from another one of the plurality of PUs, the first cache does not contain a cache line in coherency state invalid, and the first cache contains a cache line in coherency state moved, the first PU selects a cache line in coherency state moved, stores the first data block in the selected cache line and updates the coherency state of the first data block.
    Type: Grant
    Filed: December 19, 2007
    Date of Patent: November 16, 2010
    Assignee: International Business Machines Corpation
    Inventors: Robert John Dorsey, Jason Alan Cox, Hien Minh Le, Richard Nicholas, Eric Francis Robinson, Thuong Quang Truong
  • Patent number: 7821300
    Abstract: A system includes a first CML buffer configured to receive a first bias signal and a first CML signal of a first CML logic family. The first CML buffer produces a second CML signal of the first CML logic family based on the first CML signal and the first bias signal. A first coupling capacitor module couples to the first CML buffer. The first coupling capacitor module receives the second CML signal and produces a third CML signal based on the second CML signal. A second CML buffer couples to the coupling capacitor module and receives a second bias signal and the third CML signal, producing a fourth CML signal of a second CML logic family. A feedback module couples to the second CML buffer and receives the fourth CML signal producing a fifth CML signal. The second CML buffer is produces the fourth CML signal based on the second bias signal, the third CML signal, and the fifth CML signal.
    Type: Grant
    Filed: December 3, 2008
    Date of Patent: October 26, 2010
    Assignee: International Business Machines Corporation
    Inventors: Dan P. Bernard, John C. Schiff, Glen A. Wiedemeier
  • Patent number: 7802263
    Abstract: A system, method and computer program product are provided for sharing information in a distributed system. After information is received, it is stored on a bulletin board. In use, the information is shared, in real-time, among a plurality of heterogeneous processes.
    Type: Grant
    Filed: December 15, 2003
    Date of Patent: September 21, 2010
    Assignee: Stragent, LLC
    Inventors: Axel Fuchs, Scott Sturges Andrews
  • Patent number: 7778417
    Abstract: The present invention provides a means for managing title keys by establishing logical partitions of title keys encrypted with the same binding information. The invention supports delayed and background processing of title keys when binding information changes. This invention supports proper accounting for devices required to recover rebinding processing when devices fail or go offline unexpectedly during processing. The invention uses binding context which represents a set of data that can be used to determine if the binding information used to encrypt a set of title keys is outdated and allow for rebinding to the current cluster binding information level.
    Type: Grant
    Filed: May 17, 2005
    Date of Patent: August 17, 2010
    Assignee: International Business Machines Corporation
    Inventors: Matt F. Rutkowski, Julian A. Cerruti, Robert B. Chumbley