Patents Represented by Attorney The Law Offices of Bradley J. Bereznak
-
Patent number: 8093621Abstract: In one embodiment, a power transistor device comprises a substrate that forms a PN junction with an overlying buffer layer. The power transistor device further includes a first region, a drift region that adjoins a top surface of the buffer layer, and a body region. The body region separates the first region from the drift region. First and second dielectric regions respectively adjoin opposing lateral sidewall portions of the drift region. The dielectric regions extend in a vertical direction from at least just beneath the body region down at least into the buffer layer. First and second field plates are respectively disposed in the first and second dielectric regions. A trench gate that controls forward conduction is disposed above the dielectric region adjacent to and insulated from the body region.Type: GrantFiled: December 23, 2008Date of Patent: January 10, 2012Assignee: Power Integrations, Inc.Inventors: Vijay Parthasarathy, Sujit Banerjee
-
Patent number: 8076723Abstract: In one embodiment, a method comprises forming an epitaxial layer over a substrate of an opposite conductivity type, the epitaxial layer being separated by a buffer layer having a doping concentration that is substantially constant in a vertical direction down to the buffer layer. A pair of spaced-apart trenches is formed in the epitaxial layer from a top surface of the epitaxial layer down at least into the buffer layer. A dielectric material is formed in the trenches over the first and second sidewall portions. Source/collector and body regions of are formed at the top of the epitaxial layer, the body region separating the source/collector region of the pillar from a drift region of the epitaxial layer that extends from the body region to the buffer layer. An insulated gate member is then formed in each of the trenches adjacent to and insulated from the body region.Type: GrantFiled: January 11, 2011Date of Patent: December 13, 2011Assignee: Power Integrations, Inc.Inventors: Vijay Parthasarathy, Sujit Banerjee
-
Patent number: 8027459Abstract: A system and method for servicing a caller at a contact center includes providing self-service menu options to the caller through an automated system, and determining a total time spent by the caller in the automated system. If the caller's attempts at self-service are unsuccessful, the caller is transferred out of the automated system and into a position of a wait queue, the position of the caller in the wait queue being determined based on a credit for the total time spent by the caller in the automated system. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.Type: GrantFiled: May 16, 2005Date of Patent: September 27, 2011Assignee: Cisco Systems, Inc.Inventors: Johnny Lee, Fadi R. Jabbour, David C. Lee
-
Patent number: 8022456Abstract: In one embodiment, a transistor fabricated on a semiconductor die includes a first section of transistor segments disposed in a first area of the semiconductor die, and a second section of transistor segments disposed in a second area of the semiconductor die adjacent the first area. Each of the transistor segments in the first and second sections includes a pillar of a semiconductor material that extends in a vertical direction. First and second dielectric regions are disposed on opposite sides of the pillar. First and second field plates are respectively disposed in the first and second dielectric regions. Outer field plates of transistor segments adjoining first and second sections are either separated or partially merged.Type: GrantFiled: November 1, 2010Date of Patent: September 20, 2011Assignee: Power Integrations, Inc.Inventors: Vijay Parthasarathy, Sujit Banerjee, Martin H. Manley
-
Patent number: 8014322Abstract: In one embodiment, a method includes correlating, for each intermediate device associated with a Real-time Transport Protocol (RTP) application that connects endpoints through a plurality of intermediate devices across a network, one or more first RTP segments input into the intermediate device with one or more second RTP segments output from the intermediate device. The correlation results are then graphically displayed results of the correlating to obtain a full, end-to-end picture of RTP quality from a source endpoint to a destination endpoint of the RTP application. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure.Type: GrantFiled: February 26, 2007Date of Patent: September 6, 2011Assignee: Cisco, Technology, Inc.Inventors: Manjunath S. Bangalore, Randall B. Baird
-
Patent number: 7998817Abstract: A method for fabricating a high-voltage transistor with an extended drain region includes forming in a semiconductor substrate of a first conductivity type, first and second trenches that define a mesa having respective first and second sidewalls; then partially filling each of the trenches with a dielectric material that covers the first and second sidewalls. The remaining portions of the trenches are then filled with a conductive material to form first and second field plates. Source and body regions are formed in an upper portion of the mesa, with the body region separating the source from a lower portion of the mesa. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims. 37 CFR 1.72(b).Type: GrantFiled: April 18, 2009Date of Patent: August 16, 2011Assignee: Power Integrations, Inc.Inventor: Donald Ray Disney
-
Patent number: 7999606Abstract: A temperature independent reference circuit includes first and second bipolar transistors with commonly coupled bases. First and second resistors are coupled in series between the emitter of the second bipolar transistor and ground. The first and second resistors have first and second resistance values, R1 and R2, and third and second temperature coefficients, TC3 and TC2, respectively. The resistance values being such that a temperature coefficient of a difference between the base-emitter voltages of the first and second bipolar transistors, TC1, is substantially equal to TC2×(R2/(R1+R2))+TC3×(R1/(R1+R2)), resulting in a reference current flowing through each of the first and second bipolar transistors that is substantially constant over temperature. A third resistor coupled between a node and the collector of the second bipolar transistor has a value such that a reference voltage generated at the node is substantially constant over temperature.Type: GrantFiled: January 31, 2011Date of Patent: August 16, 2011Assignee: Power Intergrations, Inc.Inventors: David Kung, Leif Lund
-
Patent number: 7975180Abstract: Apparatus and method of detecting a fault in a network service includes an Ethernet access network domain in which a heartbeat message is broadcast at a periodic interval by each of a plurality of edge devices associated with an instance of the network service. Each of the edge devices also receives the heartbeat messages broadcast at the periodic interval from other edge devices. A fault occurrence is identified when the edge device fails to receive an expected heartbeat message at the periodic interval from one of the other edge devices.Type: GrantFiled: December 23, 2009Date of Patent: July 5, 2011Assignee: Cisco Technology, Inc.Inventors: Ali Sajassi, Norman W. Finn
-
Patent number: 7964912Abstract: In one embodiment, a vertical HVFET includes a pillar of semiconductor material a pillar of semiconductor material arranged in a loop layout having at least two substantially parallel and substantially linear fillet sections each having a first width, and at least two rounded sections, the rounded sections having a second width narrower than the first width, a source region of a first conductivity type being disposed at or near a top surface of the pillar, and a body region of a second conductivity type being disposed in the pillar beneath the source region. First and second dielectric regions are respectively disposed on opposite sides of the pillar, the first dielectric region being laterally surrounded by the pillar, and the second dielectric region laterally surrounding the pillar. First and second field plates are respectively disposed in the first and second dielectric regions.Type: GrantFiled: September 18, 2008Date of Patent: June 21, 2011Assignee: Power Integrations, Inc.Inventors: Vijay Parthasarathy, Sujit Banerjee, Lin Zhu
-
Patent number: 7957520Abstract: A system and method for servicing a caller at a contact center includes a plurality of call centers, each including an automatic call distributor (ACD), and an emergency response system that issues an emergency notification signal to the ACD of a call center in response to an emergency condition affecting the call center. In response, the ACD of the call center informs callers of the emergency condition, and then performs a bulk transfer of each of the active calls from the call center to one or more other call centers. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims. 37 CFR 1.72(b).Type: GrantFiled: July 14, 2005Date of Patent: June 7, 2011Assignee: Cisco Technology, Inc.Inventors: Sravan Vadlakonda, Vijetha Vadlakonda
-
Patent number: 7939853Abstract: A semiconductor device is provided that includes a substrate, a first active layer disposed over the substrate, and a second active layer disposed on the first active layer. The second active layer has a higher bandgap than the first active layer such that a two-dimensional electron gas layer arises between the first active layer and the second active layer. A termination layer, which is disposed on the second active layer, includes InGaN. Source, gate and drain contacts are disposed on the termination layer.Type: GrantFiled: March 20, 2007Date of Patent: May 10, 2011Assignee: Power Integrations, Inc.Inventors: Michael Murphy, Milan Pophristic
-
Patent number: 7940913Abstract: A system and method for servicing a caller at a contact center includes prompting the caller for a password associated with a certificate of disability of the caller, then accessing a database that contains the certificate authenticating the password to retrieve information listed in the certificate. The certificate information includes a type of disability of the caller. Following authentication, the system provides a service response appropriate for the type of disability of the caller. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.Type: GrantFiled: May 11, 2005Date of Patent: May 10, 2011Assignee: Cisco Technology, Inc.Inventors: Labhesh Patel, Fadi R. Jabbour, Johnny Lee, David C. Lee
-
Patent number: 7932738Abstract: In a method for reading a programmable anti-fuse block of a high-voltage integrated circuit a first voltage is applied to a first pin of the HVIC, the first voltage being lowered to a second voltage at a first node. Current is shunted from the first node, thereby lowering the second voltage to a third voltage. An isolation circuit block is then activated to couple the third voltage to a common node of the programmable anti-fuse block, the common node being coupled to a plurality of anti-fuses, each anti-fuse having a programmed state. A read signal is generated that causes a voltage potential representative of the programmed state of each anti-fuse to be latched into a corresponding latch element.Type: GrantFiled: May 7, 2010Date of Patent: April 26, 2011Assignee: Power Integrations, Inc.Inventors: Sujit Banerjee, Giao Minh Pham
-
Patent number: 7916653Abstract: In one embodiment, a first audio waveform is produced at a first side of a network connection and then encoded and sent by a first endpoint device to a second endpoint device at a second side of the network connection. A second audio waveform is then detected after being played out by the first endpoint device, the second audio waveform having been produced at the second side of the network connection in response to the second endpoint device playing out the first audio waveform. A round-trip delay is then calculating based on a time period measured from output of the first audio waveform to detection of the second audio waveform. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure.Type: GrantFiled: September 6, 2006Date of Patent: March 29, 2011Assignee: Cisco Technology, Inc.Inventors: Scott Firestone, Randall B. Baird, Wing Cheong Chau, Shantanu Sarkar
-
Patent number: 7911983Abstract: A computer includes a sound card and a processor that runs one or more applications that cause the processor to generate audio signals coupled to the sound card. The processor is operable to execute code that provides a graphical user interface which allows a user to selectively mute the audio signals associated with a set of the one or more applications. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.Type: GrantFiled: July 29, 2005Date of Patent: March 22, 2011Assignee: Cisco Technology, Inc.Inventors: Labhesh Patel, Martin R. Eppel, Mukul Jain, Aaron Tong
-
Patent number: 7903548Abstract: A system and method for bidirectional forwarding detection (BFD) rate-limiting and automatic BFD session activation includes tracking a total bidirectional forwarding detection (BFD) packet rate for a line card (LC) of the node, and rejecting operations associated with creation of a new BFD session that would cause the total BFD packet rate to exceed a predetermined maximum rate. The new BFD session is stored in a state on the node and the operations of the new BFD session are automatically retried at a time when doing so would not exceed the predetermined maximum rate.Type: GrantFiled: January 28, 2009Date of Patent: March 8, 2011Assignee: Cisco Technology, Inc.Inventors: Reshad Rahman, David Toscano, David Ward, Jean-Marc Simard, Christian E. Hopps
-
Patent number: 7899161Abstract: In one embodiment, a voicemail messaging system provides a user with the ability to record a voicemail message that includes at least one static portion and a dynamic content portion. When the voicemail message is accessed for listening by a recipient the dynamic content portion is filled with information retrieved via a URL link. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure.Type: GrantFiled: October 11, 2006Date of Patent: March 1, 2011Assignee: Cisco Technology, Inc.Inventors: Vinod Katkam, Mukul Jain, Sanjeev Kumar, Labhesh Patel
-
Patent number: 7893754Abstract: A temperature independent reference circuit includes first and second bipolar transistors with commonly coupled bases. First and second resistors are coupled in series between the emitter of the second bipolar transistor and ground. The first and second resistors have first and second resistance values, R1 and R2, and third and second temperature coefficients, TC3 and TC2, respectively. The resistance values being such that a temperature coefficient of a difference between the base-emitter voltages of the first and second bipolar transistors, TC1, is substantially equal to TC2×(R2/(R1+R2))+TC3×(R1/(R1+R2)), resulting in a reference current flowing through each of the first and second bipolar transistors that is substantially constant over temperature. A third resistor coupled between a node and the collector of the second bipolar transistor has a value such that a reference voltage generated at the node is substantially constant over temperature.Type: GrantFiled: October 2, 2009Date of Patent: February 22, 2011Assignee: Power Integrations, Inc.Inventors: David Kung, Leif Lund
-
Patent number: 7889754Abstract: A method of operation for a node of an Ethernet access network includes issuing a multicast message on the Ethernet access network by a maintenance end point (MEP) of the node. The multicast message contains a name of a target MEP. The node is further operable to receive a unicast reply message from the target MEP, the unicast message reply containing a MEP identifier (MEP-ID) and a MEP Media Access Control (MAC) address of the target MEP.Type: GrantFiled: July 12, 2005Date of Patent: February 15, 2011Assignee: Cisco Technology, Inc.Inventors: Wojciech Dec, Yves Hertoghs, Norman W. Finn
-
Patent number: 7881314Abstract: A network node includes a first port and a second port, the second port being operable to carry a first type of data traffic over a main physical interface, the first type of data traffic including Layer 2 services. The second port is operable to simultaneously carry a second type of data traffic over a sub-interface of the main physical interface. The second type of data traffic consisting of Layer 3 services that include point-to-point (P2P), point-to-multipoint (P2MP), and multipoint services.Type: GrantFiled: May 1, 2006Date of Patent: February 1, 2011Assignee: Cisco Technology, Inc.Inventors: Chiara Regale, Ali Sajassi, Vijay Nain, Shobana Biederman, Robert G. Pothier