Abstract: Fuzzy logic rules are applied to a method for indirectly measuring a physical signal to be monitored which would be difficult to directly measure. The measuring method comprises the steps of obtaining a derived physical signal from the physical signal to be monitored and measuring a value of the derived physical signal and its variations over time at suitably selected check points. A first set of fuzzy logic rules are applied to ascertain the presence or absence of an index signal adapted to mark at least first, second and third operational zones of the derived physical signal. Only the second operational zone is characterized by the presence of the index signal. First and second significant values of the physical signal to be monitored are measured as start and end values, respectively, of the second operational zone. An apparatus for indirectly measuring a physical signal is also disclosed.

Abstract: An AC-coupled driver comprises a drain output stage in which the quiescent-state current is set by a current mirror, and by a bias current for the current mirror. The drain output stage includes a DC coupling connected to the current mirror by a capacitive-resistive network. The DC coupling allows the drain output stage to deliver a high current following input of an AC voltage signal into the AC-coupled driver.

Abstract: A start-up circuit applies a start-up current to a current generator. The start-up circuit includes an application circuit for applying the start-up current to the current generator and an ensuring circuit ensuring that the current generator is in a predetermined stable state before the start-up current is applied thereto. The ensuring circuit prevents a flow of current in the current generator prior to application of the start-up current so that the stable state is one in which current is not conducting.

Abstract: A charge pump circuit for integrated memory devices includes a plurality of stages cascade connected between an input terminal having a first voltage reference and an output terminal. Each stage includes a boost capacitor and one PMOS transistor functioning as a pass transistor. Each PMOS transistor has conduction terminals connected between the previous stage and the next stage, and a control terminal receiving a drive signal. The pass transistors are driven with a voltage that has a ground value when they are to be turned on, and a voltage equal to the highest of the positive voltages involved when they are to be turned off. The highest of the positive voltages involved is the output from the charge pump.

Abstract: An electronic circuit with suppression of high-voltage transients on the power supply line includes first and second power transistors series-connected between first and second power supplies, and first and second driving circuits for respective first and second power transistors. The first driving circuit includes a first diode and a first Zener diode, and the second driving circuit includes a second diode and a second Zener diode. Anodes of the first diode and the first Zener diode are connected to the cathode of the second Zener diode. A cathode of the first Zener diode is connected to the first power supply. A cathode of the first diode is connected to a gate of the first power transistor. Anodes of the second diode and the second Zener diode are connected together. A cathode of the second diode is connected to a gate of the second power transistor.

Abstract: A linear type of voltage regulator, having at least one input terminal adapted to receive a supply voltage and one output terminal adapted to deliver a regulated output voltage, includes a power transistor and a driver circuit for the transistor. The driver circuit includes an operational amplifier having an input differential stage biased by a bias current which varies proportionally with the variations of the regulated output voltage at the output terminal of the regulator.

Abstract: A driving circuit supplied by a supply voltage and a reference voltage, generates an output signal and comprises a first circuit adapted to selectively couple the output signal to the reference voltage or to an internal voltage line internal to the driving circuit in response to a first control signal. The driving circuit also includes a switching circuit adapted to selectively couple the internal voltage line to the supply voltage. A boosting circuit is connected to the internal voltage line and is adapted to bring the internal voltage line to a boosted voltage. The switching circuit and the boosting circuit are controlled by a second control signal to be alternatively activatable, in such a way to bring the internal voltage line either to the supply voltage or to the boosted voltage.

Abstract: A voltage converter includes a resonant element and a switch controlled by a management unit for regulating a quantity of energy transferred from the primary circuit to the secondary circuit. The voltage converter includes a circuit for generating the supply voltage for the management unit from the output voltage of the voltage converter, and a circuit for holding the switch in a closed position when the voltage converter is initialized.

Abstract: A device for the protection of an integrated circuit input/output pin against electrostatic discharges includes a first diode between a positive power supply line and an internal connection node for connection to the pin, and a second diode between the internal node and a second negative or zero supply line. The device also includes a protection transistor series-connected between the positive power supply line and the first diode, and a stack of N diodes, where N is equal to one or more, series-connected between the control electrode of the protection transistor and the first diode.

Abstract: A contactless chip card includes a circuit for detecting the presence of radio frequency signals. A detector comprises at least one circuit for detecting the presence of radio signals by making direct use of the corresponding signals received by an antenna winding. In addition, a phase-shift detector detects the relative phase differences between signals provided by the antenna winding.

Abstract: An output circuit for an integrated circuit, includes a first transistor and a second transistor connected in series between a first external voltage and a second external voltage external to the integrated circuit, respectively through first and second electrical connecting paths. The first transistor is for carrying an output line of the integrated circuit to the first external voltage, while the second transistor is for carrying the external line of the integrated circuit to the second external voltage. The second transistor is formed inside a first well of a first conductivity type contained inside a second well of a second conductivity type formed in a substrate of the first conductivity type. The second well of the second conductivity type is connected to the first external voltage through a third electrical connecting path distinct from the first electrical connecting path.

Abstract: A chip card reader may be connected to a microcomputer to provide for data exchanges in the read or write mode between the card and the microcomputer, under the control of the microcomputer. The reader is capable of carrying out data exchanges between the card and the microcomputer and works without a microprocessor. The chip card reader is provided, firstly, with a data buffer memory enabling the temporary storage of the pieces of data read in the card, and, secondly, with a frequency divider programmable by a frequency signal to set the bit time at will. By the division of frequency of an internal clock of the reader, this bit time is the duration corresponding to the transmission of a data bit in the data exchanges between the chip card and the reader. The reader can then carry out transmissions with slow or fast protocols independently of the microcomputer.

Abstract: A method for positioning/routing a clock circuit for an integrated circuit compensates for phase differences by adjusting secondary amplifiers having adjustable input delays. The method includes the steps of positioning first conductive lines parallel to a first direction evenly spaced with respect to the second direction. The first conductive lines are connected to outputs of the first amplifiers. A balanced tree-like structure provides each of the first amplifiers a clock signal coming from a single source. The method further includes the steps of positioning functional blocks for forming the integrated circuit, and the positioning of second lines parallel to the second direction. Each secondary amplifier is routed to the closest second line. An equivalent electrical diagram corresponding to the path taken by the clock signal between the input of the tree-like structure device and the input of each secondary amplifier is determined.

Abstract: The SECAM chrominance signal demodulator includes an oscillator with a controlled frequency, a phase comparator with a first input connected to an oscillator output, a second input to receive a chrominance signal, and an output connected to an input loop of the oscillator. The demodulator further includes a fixed current source, also connected to the loop input, a current mirror to copy a current equal to the sum of the fixed current and a comparator output current in the output branches comprising first and second calibration resistors respectively, in series with a common resistor. Output voltages corresponding to the red and blue components of the chrominance signal are measured at the terminals of the calibration resistors respectively. The demodulator is used in television sets, for example.

Abstract: A method and system produce a PWM signal using a comparator having first and second input terminals and an output terminal at which the PWM signal is produced. The method includes powering the comparator with a supply voltage and receiving a modulating signal at the first input terminal. The method creates a carrier signal with a constant frequency and a maximum amplitude equal to the supply voltage. The comparator receives the carrier signal at the second input terminal and compares the carrier signal to the modulating signal, thereby producing the PWM signal at the output terminal. By creating and using a carrier signal with a maximum amplitude equal to the supply voltage, the PWM signal produced by the method is immune from changes in the supply voltage.

Abstract: The operation of externally connected output power transistors of a class AB amplifier is controlled without employing any external sensing resistance of the output current by driving an externally connected power transistor through a level shifting buffer and employing a limiting network composed of an integrated transistor driven by the output of a signal amplifying stage and a resistance connected in series with its drain. The buffer stage shifts the level of the driving signal of the external power transistor by a value equal to the threshold voltage of the integrated transistor of the limiting network thus ensuring the turn-off of the external power transistor under quiescent conditions.

Abstract: A non-volatile memory cell of the type which includes at least one floating gate transistor and which is realized over a semiconductor substrate includes a source region, and a drain region, separated by a channel region which is overlaid by a thin layer of gate oxide. The gate oxide isolates a floating gate region from the substrate. The floating gate region is coupled to a control gate terminal. The floating gate region of the memory cell develops a first potential barrier between the semiconductor substrate and the gate oxide layer, and a second different potential barrier between the floating gate region and the gate oxide.

Abstract: A .SIGMA..DELTA. digital/analog converter includes a signal reconstructing multirate low pass filter realized as a switched capacitor fully differential, double sampled structure. The input stage of the filter employs only two sampling capacitors, switched alternately on the two inputs of the stage. The input stage further includes two delay circuits (z.sup.-1) in the feed line of the bitstream towards one of the two inputs of the multistage SC filter. The zeroes introduced in the transfer function reduce the noise energy in the vicinity of frequencies f.sub.s /2.sup.n, preserving the SNR even with a relatively large mismatch between the capacitors.

Abstract: A method is to characterize a process of ion implantation and includes a step of the measurement, by a spectroscopic ellipsometer, of the ellipsometric parameters (tan.psi., cos.delta.)of a film of organic resin present on the surface of a wafer that has received ion bombardment. The film of resin includes at least one upper layer of carbonized or damaged resin.

Abstract: An integrated amplifier includes a differential input stage including a first pair of bipolar junction transistors. A reference bias current generator biases the differential input stage with a reference bias current. A first and a second current mirror circuit drives a respective transistor of the first pair of bipolar junction transistors. Each of the first and second current mirror circuits includes a transistor having a base terminal connected to an intermediate node. An integrated resistor is connected to the intermediate node and is in series with the respective transistor of the first pair of bipolar junction transistors. The reference bias current of the differential input stage conducts through the integrated resistor. The reference bias current corresponds to a ratio between a base emitter junction voltage and a resistance of the integrated resistor.