Abstract: A word line clamping circuit for use with field effect transistor memories is disclosed which permits the clamping of the word line to a reference potential using a minimum of devices and without the consumption of d.c. power so that multi-level bit line potentials may be utilized during the memory cycle. This is achieved by connecting a field effect transistor (FET) between word line and ground under control of a word line decoder so that a node associated with the last mentioned FET is held in either an uncharged or charged condition depending on whether the decoder is selecting its associated word line or not selecting it.

Abstract: A distributed Josephson junction logic circuit is disclosed which includes a plurality of serially disposed Josephson junctions in a superconductive wire-over-groundplane environment wherein the latter is terminated at both ends in its characteristic impedance and energized at one end with a constant voltage source. In addition, at least one portion of the wire-over-groundplane transmission line, which is disposed in series with the junctions, is utilized as an output control and has the same steady state current flowing in it as the plurality of Josephson junctions. Utilizing such an arrangement, logic can be performed by means of multiple controls on a single junction as in terminated line logic or by means of several junctions, each with one or more independent controls, in series. The design is such that the switching of any one or more junctions to the voltage state causes a decrease in current from a level which represents a logical "1" to a lesser current which is representative of a logical "0".

Abstract: Superconducting devices comprising at least a pair of Josephson tunneling junctions and means for providing a large kinetic inductance interconnecting the pair of Josephson junctions are disclosed. The kinetic inductance is obtained by providing, as a portion of the device, a superconducting element having a thickness much less than its penetration depth. The high inductance devices provided by this means permit an overall increase in device packing density and power reduction, not obtainable with conventional structures. The resulting devices have enhancement ratios of at least one.

Abstract: Logic elements comprising resettable Josephson junctions cooperating with matched transmission lines have input circuit inductances connected to reversible Josephson devices which are so small that a flux of less than one flux quantum only can be trapped therein preventing the continued circulation of supercurrent in the inductance after removal of the input signals from the associated reversible Josephson junctions.The resettable junctions are designed such that upon removal of the input or control field from the resettable Josephson junctions connected to the transmission line, the a.c. voltage which is generated across said junction, is larger than the time-average d.c. voltage across said junction when switched to its state of normal conductance so that, after removal of the input or control field from said junction, the d.c. voltage is caused to lock back to zero, thus resetting the element. Circuit parameters for achieving resettability without interrupting gate current are given.

Abstract: A Josephson junction terminated line logic powering scheme is disclosed wherein a logic gate and a regulating gate are utilized in at least a single logic circuit to provide a constant voltage to the logic circuit. The circuit comprises a terminated line logic gate with its associated sense gate and a regulating gate in series with the logic gate. When the logic gate is switched to the voltage state, it sends a disturb signal up and down the line which carries the gate current to the logic devices. A regulator gate which has already been biased to the voltage state is reset to the zero voltage state by the disturb signal. The resetting of the regulator gate sends out a disturb signal which cancels the original disturb signal with a small delay. The result of the combination of the disturbance generated by the logic gate and the regulating gate is an extremely narrow pulse with a maximum width equal to the round trip delay between the adjacent gates having an amplitude of I-I.sub.min.

Abstract: A Josephson junction device using intermetallic compounds in its electrodes to reduce stress relaxation, such as hillock growth, during temperature cycling. The intermetallic compounds are present in only the base electrode or in both the base electrode and the counter electrode. For lead electrodes, intermetallics of gold, platinum, palladium, magnesium, tellurium, etc. are suitable. Other superconductors and their intermetallics can also be used for the electrode structures. Low tunneling resistance and high Josephson current result, and the tunneling barriers are uniform and dense.

Abstract: Josephson tunneling devices are used as parametrons in circuits for logic and memory. Parametron circuits are used as input devices to conventional pulsed Josephson tunneling device circuitry, and as output devices from pulsed Josephson tunneling device circuitry. Therefore, transfers from phase information to pulse information and from pulse information to phase information are obtained. Interconnection between superconducting circuit chips is achieved using Josephson tunneling parametrons and Josephson tunneling detectors. Another interconnection scheme uses capacitive coupling between superconducting circuit chips without physical interconnections therebetween, and employs Josephson tunneling devices on separate chips for the receiving and sending circuitry.

Abstract: A quantum interference Josephson junction logic device is disclosed which comprises three or more junctions connected in parallel which are capable of carrying Josephson current and includes means integral with at least one of the junctions for carrying a larger maximum Josephson current than the remaining junctions. This integral means includes means for carrying a maximum Josephson current which is twice as large as the maximum Josephson current in the remaining junctions. While the spacing between the lobes of the threshold curve (I.sub.m vs. I.sub.c) is increased over that of a two junction interferometer by adding another junction resulting in an increased operating region in which logic circuits switch to the voltage state, good current gains with large lobe separation could not be achieved by the mere addition of junctions. Current gain with large lobe separation is obtained if the two outer junctions having a zero field threshold current, I.sub.

Abstract: A polishing method for single crystal dielectrics such as sapphire and magnesium spinel is disclosed. A single crystal wafer of sapphire or magnesium spinel is immersed in a mixture of sulphuric and phosphoric acid in a range of mixtures of 9 parts sulphuric acid to 1 part phosphoric acid to 1 part sulphuric acid to 9 parts phosphoric acid by volume while the mixture is held at a temperature in the range of 200.degree.-325.degree.C. The rate of polishing as well as the quality of polishing of the wafers of sapphire or magnesium spinel is orientation sensitive and polishing is achieved for magnesium spinel having the orientations (100) and (110). Polishing is achieved for sapphire having the orientations (0001), (1123), (1100), (1124), (1120) and (0112). A wafer to be polished is suspended in the heated solution and may be rotated slowly. Nonpreferential material removal rates of fractions of a micron per minute are obtained.

Abstract: Two Josephson gates are connected in series to a low impedance voltage source. Each junction is bridged by a load impedance. The feed voltage is maintained in the order of the gap voltage which corresponds to the voltage drop across a Josephson junction when it is in its single-particle-tunneling state. Therefore, only one out of both Josephson elements can exist in the voltage state at a time, and the other junction is forced to assume the superconducting pair-tunneling state.In its symmetric form, the basic circuit can be used as flip-flop or storage means. If asymmetric, the basic circuit shows monostable switching behavior, and it can be used as logic gate. Circuit asymmetry can be caused either by design using different junction areas or electrically by proper bias control currents applied to either or both gates of the basic circuit. The degree of symmetry or asymmetry can even be shifted with electrical means.

Abstract: A comparison means has plural Josephson devices each controlled by an analog input current and an opposing subtraction current. A subtraction means has a series circuit of Josephson devices arranged in groups, each group being switched by one of the comparison devices. The subtraction current is proportional to the number of devices switched in the series circuit. An output means has a string of Josephson devices each providing an output bit from one of the comparison devices. Fixed bias currents control the effective thresholds of the comparison devices.

Abstract: An information storage device which stores a single flux quantum without bias is disclosed. The device includes a single Josephson tunneling device made from two superconductive materials spaced apart by an insulator wherein a Josephson current density profile J.sub.1 (x) defined by ##EQU1## IS CHARACTERIZED SUCH THAT THE PROFILE HAS A LARGER MAGNITUDE AT THE BOUNDARY PORTIONS OF SAID DEVICE THAN AT THE CENTER. The current density profile is controlled by adjusting either the oxide thicknesses, the work function of the superconductors or by changing the shape of the junction from its usual rectangular cross-section.A sensing arrangement for the above described storage devices is also disclosed. By controlling the damping of the above described structures, the gain characteristics and the vortex characteristics are adjusted to permit coincident selection of a single device.

Abstract: An interferometer arrangement of either the transmission or reflection type incorporating at least a pair of partially spherical or spherical elements having an index of refraction of approximately two is disclosed. In a preferred embodiment, the spherical or radiation directing elements are glass spheres having an index of refraction of approximately two at the wavelength of a light source being utilized. In a transmission type interferometer, both the spherical or radiation directing elements are utilized as beam splitters and collimators while, in the reflection type interferometer, one of these spheres is used as a beam splitter and collimator while the other is utilized as a retroreflector. The complete spherical symmetry of such radiation directing elements permits them to function with any orientation relative to the optical path between them.