Abstract: A method and apparatus for sample rate conversion in an analog to digital converter includes processing that begins by converting an analog input signal into a stream of digital data. The processing continues by determining an up sampling value and a down sampling value based on a sample rate conversion value. The processing continues by computing a moving sum of data of the stream of data based on the up sampling value, the clock rate of the stream of data, and a predetermined filter function. The processing continues by producing a digital output value from the moving sum based on the down sampling value, wherein the digital output value is at a desired output rate.

Abstract: An electrostatic discharge (ESD) protection circuit for use in an integrated circuit includes a transistor, an inverter, and an ESD detector. The transistor is coupled to clamp a non-power supply pad of the integrated circuit to a power supply pad of the integrated circuit when an ESD event is detected. The ESD detector is operably coupled to detect an ESD event on the non-power supply pad and to provide an indication of the ESD event to the inverter. The inverter provides an amplified signal to the gate of the transistor such that the transistor is driven quickly into low impedance conduction.

Abstract: A method and apparatus for multilevel signaling includes processing that begins by determining multilevel signaling operation conditions. The processing then continues by generating an adjust signal based on the determined multilevel signaling operation conditions. The adjust signal is used to change the magnitude of the multilevel signals produced via the multilevel encoding. The adjust signal may vary a supply voltage and/or vary gain of an amplifier stage.

Abstract: A differential line driver that includes a 1st operational amplifier, a 2nd operational amplifier, an adjustable reference module, a 1st feedback impedance, and a 2nd feedback impedance. First inputs (e.g. the inverting input or non-inverting input) of the 1st and 2nd operational amplifiers are coupled to receive an input signal. The 2nd inputs (e.g. the compliment of the 1st input) of the 1st and 2nd operational amplifiers are operably coupled to receive an adjustable reference voltage from the adjustable reference module. The adjustable reference module provides the adjustable reference voltage based on the common mode of the power source for the 1st and 2nd operational amplifiers (e.g. Vdd, Vss) and/or the common mode of the input signal. The 1st and 2nd feedback impedances, (e.g. resistors) are coupled from the output of the respective operational amplifiers to either the 1st or 2nd input of the respective operational amplifiers.

Abstract: A tunable differential amplifier includes an amplifier circuit, a current mirror, a dynamic current regulator, and a dynamic output common mode regulator. The current mirror is operably coupled to the amplifier circuit and controls the current flowing through each leg of the amplifier circuit. The current through the current mirror is established based on a regulated current provided by the dynamic current regulator and a common mode error current signal provided by the dynamic output common mode regulator. The common mode error signal is representative of an error between the desired output common mode of the amplifier circuit and the actual common mode of the output of the amplifier circuit. The regulated current is based on the common mode of the input of the amplifier circuit. As such, the biasing current and the common mode output of the differential amplifier is dynamically regulated.

Abstract: A Class AB voltage-to-current converter includes a primary transconductance stage, secondary transconductance stage, and a biasing circuit. The biasing circuit generates a primary bias voltage that is greater than a generated secondary bias voltage. As such, the primary transconductance stage 12 becomes active before the secondary transconductance stage 14 with respect to the magnitude of a differential input voltage 18, thereby allowing the transconductance of the secondary transconductance stage to be added (or subtracted) from the transconductance of the primary stage to improve the overall transconductance of the Class AB voltage-to-current convert.

Abstract: A signal coupler is provided which decreases the number of discreet elements required to provide low pass filtering for the plain old telephone service (POTS). The low pass filtering is shifted to areas of the signal coupler circuit which do not operate with the high battery voltage present on telephone lines The low voltage filtering reduces the need for components which are capable of operating in the high voltage environment and therefore reduces the space on the circuit board which is occupied by each of the signal couplers. In this way, the number of individual subscriber lines that a given circuit board can accommodate can be increased.

Abstract: A method and apparatus for integrating buck or boost converting includes processing for controlling the configuration of transistors, an inductor, a power source, and a load to provide buck or boost converting. Such processing begins by determining whether a buck/boost signal is indicating buck operation or boost operation. If the buck/boost signal is indicating buck operation, the processing proceeds by generating a buck control signal and a load control signal. The buck control signal is provided to the transistors such that the transistors are coupled to a power source and the inductor to provide a buck converter. The load control signal is provided to a load transistor to regulate the output with respect to the load. When the bucklboost signal indicates boost operation, the processing generates a boost control signal and a load control signal. The boost control signal is provided to the transistors such that the transistors are coupled to the power source and the inductor to provide a boost converter.

Abstract: A high-speed, low distortion line driver that includes an amplifying circuit and a differential input amplifier. The differential input amplifier includes a 1st amplifying transistor, a 2nd amplifying transistor, a 1st controlled current source, and a 2nd controlled current source. The 1st amplifying transistor is coupled in series with the 1st controlled current source and the 2nd amplifying transistor is coupled in series with the 2nd controlled current source. The 1st and 2nd amplifying transistors are operably coupled to receive a differential input signal and provide a gained and level shifted representation of the differential input signal based on the controlled currents provided by the 1st and 2nd current sources. The amount of gain is based on the transconductance properties of the 1st and 2nd amplifying transistors and of the 1st and 2nd current sources.

Abstract: A line driver having variable impedance termination includes an impedance, a 1st variable feedback, a 2nd variable feedback, a summing module and a gain module. The 1st and 2nd variable feedbacks provide feedback based on the desired impedance for the particular application. The summing module is operably coupled to sum the 1st variable feedback, the 2nd variable feedback and a signal to produce a resultant signal. The gain module is operably coupled to receive the resultant signal and to amplify the signal to produce a gained signal. The output of the gain module is operably coupled to the impedance wherein the other node of the impedance provides the output of the line driver. To provide the feedback, the 1st variable feedback is operably coupled to the output of the gain module and the summing module and the 2nd variable feedback is operably coupled to the output of the line driver and the summing module.

Abstract: A method and apparatus for controlling power consumption of an integrated circuit include processing that begins by producing a system clock from a reference clock based on a system clock control signal. The reference clock may be generated from an external crystal oscillator circuit operable to produce a reference clock at a desired frequency. The processing continues by regulating at least one supply from a power source and an inductor based on a power supply control signal. The processing continues by producing the system clock control signal and the power supply control signal based on a processing transfer characteristic of a computational engine and processing requirements associated with processing at least a portion of an application by the computational engine.

Abstract: A method and apparatus for converting sample rates of digital signals includes processing that begins by receiving an input data stream at a first sample rate. The processing continues by retrieving predetermined integrated samples at the first sampling rate, where the predetermined integrated samples are derived based on a ratio between the first sampling rate and a second sampling rate. The processing then continues by adjusting the retrieved predetermined integrated samples based on data values of the input data stream to produce adjusted integrated samples. The processing continues by differentiating the adjusted integrated samples to produce an output data stream at an output sample rate, wherein the second sample rate is a multiple of the output sample rate.

Abstract: A method and apparatus for efficiently powering an integrated circuit include processing that begins by generating a representation of a battery voltage. The processing then continues by producing a regulated bias current based on the representation of the battery voltage. The processing continues by providing the regulated bias current to an external crystal, which, in turn, generates an oscillation in response to the bias current. The processing then continues by generating a clock signal from the oscillation produced by the external crystal. The clock signal is then provided to a DC-to-DC converter that converts the battery voltage into a regulated output voltage.

Abstract: A method and apparatus for reducing power consumption in driver circuits includes processing that begins by receiving information pertaining to an input signal. Such information may be a digital information representation of the input signal, the input signal, a resulting drive signal, an amplifying setting signal, a volume setting, or magnitude information of the input signal. The processing continues by generating a control signal based on the information. The control signal is provided to a power supply that produces a controlled supply voltage that varies in accordance with the control signal. The controlled supply voltage is then provided to a driver circuit that amplifies the input signal to produce a drive signal.

Abstract: In accordance with a specific embodiment of the present invention, a system is disclosed having an analog to digital converter and control module. The analog-to-digital converter includes an analog input, digital output, and control input. The control input of the analog-to-digital converter is connected to a pulse width modulated output of the control module which provides an offset pulse width modulated signal. During a first portion of the offset pulse width modulated signal a sampling capacitor is charged. During a second portion of the offset pulse width modulated signal an integration capacitor is charged.

Abstract: A method and apparatus for detecting an overflow in a data stream include processing that begins by monitoring content of a stream of data. As the content of the stream of data is being monitored, the processing provides a word length signal that has a rate corresponding to a word rate of the stream of data. When the content of the stream of data is in a first logic state for an interval between the word length signal and a previous word length signal, the processing provides an overflow indication.

Abstract: An integrated circuit having a unique identifying module includes a first and second bonding pads that are deposited on a die. The identifying module further includes a bond determining module that is operably coupled to the first and second bonding pads. As coupled, the bond determining module determines the bonding status of the first and second bonding pads. For example, the bonding status indicates whether a packaged pin is bonded to the first bonding pad, the second bonding pad, both bonding pads or neither bonding pad. Based on the bonding status, the bond determining module produces a die identifier which uniquely identifies the integrated circuit.

Abstract: A method and apparatus for pulse position modulation begins when a digital data stream is received. The encoding process continues by obtaining a set of bits from the digital data stream and modulating the set of bits into a pulse having a pulse width. Next, a transition edge of the pulse is positioned at one of a plurality of time intervals within a time chip based on the set of bits, wherein the pulse width is greater than each of the plurality of time intervals.

Abstract: A method and apparatus for regulating a DC output voltage of a switch mode converter. The method and apparatus includes processing that begins by comparing a representation of the DC output voltage with a reference voltage to produce a digital stream of comparison data. The comparing is done at a given clock rate such that the digital stream of comparison data is produced at the corresponding clock rate. The processing then continues by interpreting the digital stream of comparison data to produce a digital stream of charged data and load data. The processing continues by interpreting the digital stream of charge data and load data to determine, for a given set of clock cycles, a charge signal and a load signal. The processing then continues by enabling charging of an external element (e.g., an inductor) in accordance with a charge signal for the given set of clock cycles. The processing further includes enabling discharging of the external elements to a load (e.g.

Abstract: A pre-amplifier circuit, which may be used in a variety of data recovery circuits to accurately recover data transmissions, includes an input regulatory circuit, a feedback circuit, and an amplifier. The input regulatory circuit regulates the magnitude of the data signal provided to the amplifier based on feedback signals from a feedback circuit. For low level data signals, the input regulatory circuit provides a full, or almost full, representation of the data signal to the amplifier for amplification. But, when the data signal levels increase, the input regulatory circuit attenuates, based on the feedback signals, the data signals more and more before providing them to the amplifier, such that the output of the amplifier stays within a certain range.