Abstract: A semiconductor die includes a metal layer deposited thereon for enhancing adhesion between the die and a mold compound package. The metal layer is substantially oxide free. The die is coated with a layer or layers of copper (Cu) and/or palladium (Pd) by electroplating or electroless coating techniques. The metal layer provides a uniform wetting surface for better adhesion of the die with the mold compound during encapsulation. The increased adhesion reduces the delamination potential of the die from the package.

Abstract: The present invention is directed to a packaged semiconductor chip that utilizes a multilevel leadframe that positions the lead fingers close to the bond pads while positioning the bus bars on a different level and behind or outboard of the lead finger connections such that it is unnecessary for any wires to cross over the bus bars or the lead fingers. The leadframe may comprise a multi-part frame, or be fabricated from a single sheet of metal.

Abstract: A method and apparatus for attaching a semiconductor device to a substrate. One end of the substrate is elevated to position the substrate and the coupled semiconductor device on an inclined plane. An underfill material is introduced along a wall of the semiconductor device located at the elevated end of the inclined substrate with the underfill material being placed between the substrate and the semiconductor device. An optional but preferred additional step of the invention includes coupling a barrier means to the substrate at a point on the substrate adjacent to a sidewall of the semiconductor device located at the lowest point of the slope created by the inclined substrate. The barrier means prevents the underfill material from spreading beyond the sidewalls of the semiconductor device, particularly in instances where the substrate is inclined at a steep angle.

Abstract: A honeycomb/webbed, high surface area capacitor formed by etching a storage poly using an etch mask having a plurality of micro vias. The etch mask is preferably formed by applying an HSG polysilicon layer on a surface of the storage poly with a mask layer being deposited over the HSG polysilicon layer. An upper portion of the mask layer is removed to expose the uppermost portions of the HSG polysilicon layer and the exposed HSG polysilicon layer portions are then etched, which translates the pattern of the exposed HSG polysilicon layer portions into the storage poly. The capacitor is completed by depositing a dielectric material layer over the storage poly layer and depositing a cell poly layer over the dielectric material layer.

Abstract: An inventive method of manufacturing IC devices from semiconductor wafers includes providing the wafers and fabricating IC's on the wafers. At probe, a unique fuse ID is stored in each IC, and an electronic wafer map is electronically stored for each wafer indicating the locations of good and bad IC's on the wafer and the fuse ID's of the IC's on the wafer. Each IC is then separated from its wafer to form an IC die, and the IC dice are assembled into IC devices. At the opens/shorts test at the end of assembly, the fuse ID of each IC in each device is automatically retrieved so the wafer map of the IC device may be accessed and evaluated to identify any IC devices containing bad IC's that have accidentally been assembled into IC devices. These "bad" IC devices are discarded, and the remaining IC devices continue on to back-end testing.

Abstract: An anti-idiotypic monoclonal antibody that is specific against the N-glycolyl residues of gangliosides, particularly those expressed by cancer cells. The monoclonal antibody is useful as an immunomodulator for cancer treatment. Specifically, the anti-idiotype monoclonal antibody of the present invention is capable of inducing a predominant anti-idiotypic response in xenogeneic models. The anti-idiotypic monoclonal antibody also exerts a protective effect against malignant tumors in animals.

Abstract: A method of using adhesive tape to temporarily retain a die being temporarily held in a fixture during testing and burn-in. The method of the present invention uses a die cut piece of adhesively coated tape to hold a die in a test and burn-in fixture. Upon subsequent heating of the tape beyond the normal operating range of the adhesive coating on the tape, the die is removed from the tape, the tape is removed from the test and burn-in fixture, and the remaining adhesive, if any, is removed from the test and burn-in fixture.

Abstract: An inventive printed circuit board for chip-on-board applications has a ground plane that is externally exposed through apertures in any overlying layers in the board so the backside surface of a bare integrated circuit die can be directly attached to the ground plane using a silver-filled epoxy. As a result, heat is conducted away from the die through the ground plane. Also, a substrate bias voltage can be supplied to the backside surface of the die through the ground plane to eliminate the need for an internal substrate bias to the die, and to eliminate the need for a substrate bias voltage bond pad on the front-side surface of the die.

Abstract: A method and apparatus for ensuring accuracy of weight measurement of objects on a conveyor and providing security against pilferage or miscoding of the objects. A series of sensors such as photocells linked to a process control unit sense passage of objects to respectively activate a scale and cubing system associated with the conveyor, to release an additional object for weighing and cubing, to sense overlong objects exceeding the length of the scale, and to detect when an object has been stolen or otherwise removed (as by falling off) the conveyor between various locations through the use of programmed timing "windows" between the various sensors. If an object does not trigger a sensor within the window measured from passage past a preceding sensor, an error message is generated.

Abstract: A method is provided for forming a film of ruthenium or ruthenium oxide on the surface of a substrate by employing the techniques of chemical vapor deposition to decompose precursors of ruthenium having the formula: L.sub.y RuX.sub.z where L is a neutral or monoanionic ligand selected from the group consisting essentially of linear hydrocarbyls, branched hydrocarbyls, cyclic hydrocarbyls, cyclic alkenes, dienes, cyclic dienes, trienes, cyclic trienes, bicyclic alkenes, bicyclic dienes, bicyclic trienes, tricyclic alkenes, tricyclic dienes, tricyclic trienes; fluorinated derivatives thereof; derivatives thereof additionally containing heteroatoms such as a halide, Si, S, Se, P, As, N or O; and combinations thereof; where X is a pi-bonding ligand selected from the group consisting of CO, NO, CN, CS, nitriles, isonitriles, trialkylphosphines, trialkylphosphites, trialkylamines, and isocyanide, and where subscripts y and z have a value of from one (1) to three (3); or L.sub.1 Ru(CO).sub.

Abstract: An LOC die assembly including a die dielectrically adhered to the underside of a lead frame. The adhesive is applied over a minimum cross-sectional area and number of attachment points to maximize flexure of leads extending over the active surface of the die. In this manner, flexure of the leads to accommodate filler particles lodged between the leads and the active surface of the die during transfer molding of a plastic encapsulant is maximized, and the point stresses on the active surface caused by the filler particles are reduced by the lead flexure.

Abstract: An apparatus for performing a global planarization of a surface of a deformable layer of a wafer on a production scale. The apparatus includes a chamber having a pressing surface and containing a rigid plate and a flexible pressing member or "puck" disposed between the rigid plate and the pressing surface. A wafer having a deformable outermost layer is placed on the flexible pressing member so the deformable layer of the wafer is directly opposite and substantially parallel to the pressing surface. Force is applied to the rigid plate which propagates through the flexible pressing member to press the deformable layer of the wafer against the pressing surface. Preferably, a bellows arrangement is used to ensure a uniformly applied force to the rigid plate. The flexible puck serves to provide a self adjusting mode of uniformly distributing the applied force to the wafer, ensuring the formation of a high quality planar surface.

Abstract: A masking and etching technique during the formation of a memory cell capacitor which utilizes an etching technique to utilize a maximum surface area over the memory cell and to form thin spacers to pattern separation walls between capacitors. This technique results in efficient space utilization which, in turn, results in an increase in the surface area of the capacitor for an increased memory cell capacitance.

Abstract: A method of calculating the carbon dioxide elimination of a patient that includes counteracting any inaccuracy or inconsistency in respiratory flow measurements that may be caused by "noise", such as is attributable to respiratory circuit leaks, signal drift, a non-unity respiratory quotient, or another respiratory flow error-inducing factor. The method includes monitoring the respiratory flow and carbon dioxide of the patient during at least a portion of both inspiration and expiration; calculating an inspiratory tidal volume, an inspiratory volume averaged carbon dioxide fraction, an expiratory tidal volume, and an expiratory volume averaged carbon dioxide fraction; and selecting a tidal volume to replace at least one of the inspiratory tidal volume and the expiratory tidal volume. The carbon dioxide elimination of the patient is then calculated with the select tidal volume, the inspiratory volume averaged carbon dioxide fraction, and the expiratory volume averaged carbon dioxide fraction.

Abstract: A method and apparatus for repair of a multi-chip module such as a memory module is provided, where at least one redundant or auxiliary chip attach location is provided on the substrate of the multi-chip module. The auxiliary chip attach location preferably provides contacts for attachment of more than one type of replacement semiconductor chip. Accordingly, when one or more chips on the multi-chip module are found to be completely or partially defective, at least one replacement chip can be selected and attached to the auxiliary location to provide additional memory to bring the module back to its design capacity.

Abstract: A method and resulting structure for reducing refraction and reflection occurring at the interface between adjacent layers of different materials in a semiconductor device, assembly or laminate during an alignment step in a semiconductor device fabrication process. The method comprises forming a first layer of material, having a first index of refraction, over a substrate of the semiconductor device, assembly or laminate. A corrective layer is formed over the first layer and a second layer, having a second index of refraction, is then formed over the corrective layer. The corrective layer is composed of a material having an intermediate index of refraction between the first index of refraction and the second index of refraction. The method can also be modified to include one or more layers of materials and/or intermediate refraction layers interposed between or above any of the aforementioned adjacent layers.

Abstract: A method of fabricating a field emission array that employs a single mask to define the emitter tips thereof and their corresponding resistors. A layer of conductive material is disposed over a substrate of the field emission array. A plurality of substantially mutually parallel conductive lines is defined from the layer of conductive material. At least one layer of semiconductive material or conductive material is disposed over the conductive lines and over the regions of the substrate exposed between adjacent conductive lines. A mask material is disposed over the layer of semiconductive material or conductive material, substantially above each of the conductive lines. Portions of the layer of semiconductive material or conductive material exposed through the mask material may be removed to expose substantially longitudinal center portions of the conductive lines. Other portions of the layer of semiconductive material or conductive material may remain over peripheral lateral edges of the conductive lines.

Abstract: A semiconductor die assembly and methods of forming same comprising a lead frame having a plurality of lead fingers and a semiconductor die having a plurality of electric contact points on an active surface of said semiconductor die. The electric contact points are located or rerouted on the semiconductor die active surface so as to maximize the size and spacing of electric contact points relative to the lead fingers, which may be custom-configured to match the "open" array of contact points and widened to enhance surface area for connection thereto. This arrangement results in large and robust flip-chip type interconnections between the electric contact points and the lead frame, eliminating the need for wirebonding and for adhesive connections of the lead frame to the die active surface.