Abstract: In a liquid ejection apparatus including a plurality of chips arranged in a specific direction, each chip including a plurality of liquid ejection units juxtaposed in the specific direction, the displacement of liquid landing position in the specific direction is reduced. A printer head chip includes a heating resistor, which is divided into two and arranged within one ink liquid chamber. The two-divided heating resistors within the one ink liquid chamber are juxtaposed in a direction perpendicular to the lining-up direction of nozzles.

Abstract: A mask capable of alignment by the TTR system and complementary division and having a high strength, a method of production of the same, and a method of production of a semiconductor device having a high pattern accuracy are provided. A stencil mask having stripe-shaped grid lines 4 formed by etching a silicon wafer in four sub-regions A to D on a membrane, having the stripes arranged point symmetrically about a center of the membrane, and having all of the grid lines connected to other grid lines or the silicon wafer around the membrane (support frame), a method of production of the same, and a method of production of a semiconductor device using the mask.

Abstract: The present invention employs a polymer material exhibiting a low absorbance in the wavelength range of a vacuum ultraviolet (VUV) light to allow the improved ultra-fine process to be realized. In an exposure method for selectively exposing a resist layer to an ultraviolet light to pattern the resist layer into a predetermined shape, a polymer material, to which a cyclopentane group is introduced, is used as a polymer material constituting the resist layer, wherein at least one hydrogen atom of the introduced cyclopentane group is substituted by at least one selected from the group consisting of a fluorine atom, a trifluoromethyl group and a difluoromethylene group.

Abstract: In order to provide a nonvolatile semiconductor storage device designed to take off such existing restraint on the degree of freedom of device design as needed for the purpose of securing design margin, thus realizing a ferroelectric, nonvolatile storage device of high integration density, there is disclosed a capacitor using a ferroelectric thin film is provided, so that the apparent coercive electric field value in the operational guaranteed margin temperature of the nonvolatile semiconductor storage device when regarded as the voltage applied to the capacitor remains within the range of design margin of the nonvolatile semiconductor storage device at the coercive electric field value at the specified temperature, in which a metal oxide of a layer structure having the ferroelectric-to-normal dielectric phase transition point of 800° C. or higher may be used for the ferroelectric thin film.

Abstract: Disclosed is a method of manufacturing a semiconductor device. A plurality of device separation regions are formed in an SOI layer of an SOI substrate, a desired impurity is implanted into a body portion of an Si active layer region, and therereafter a gate electrode is formed with a gate insulation film therebetween. Thereafter, an impurity is implanted into the Si active layer region to form extension portions of source/drain portions, and then an impurity different in polarity from the impurity in the source/drain portions is halo-implanted to form a reverse-characteristic layer. In the halo implantation, the range of projection is set to reach the inside of a buried oxide film. With this configuration, in a fully depleted SOI-MOSFET or the like provided with a thin film SOI layer, it is made possible to simultaneously achieve an improvement of roll-off characteristic and a reduction in parasitic resistance and to secure a sufficient driving capability.