Abstract: A system and method for thread scheduling with a weak preemption policy is provided. The scheduler receives requests from newly ready work. The scheduler adds a “preempt value” to the current work's priority so that it is somewhat increased for preemption purposes. The preempt value can be adjusted in order to make it more, or less, difficult for newly ready work to preempt the current work. A “less strict” preemption policy allows current work to complete rather than interrupting the current work and resume it at a later time, thus saving system overhead. Newly ready work that is queued with a better priority than the current work is queued in a favorable position to be executed after the current work is completed but before other work that has been queued with the same priority of the current work.

Abstract: Source code subtasks are compiled into byte code subtasks whereby the byte code subtasks are translated into processor-specific object code subtasks at runtime. The processor-type selection is based upon one of three approaches which are 1) a brute force approach, 2) higher-level approach, or 3) processor availability approach. Each object code subtask is loaded in a corresponding processor type for execution. In one embodiment, a compiler stores a pointer in a byte code file that references the location of a byte code subtask. In this embodiment, the byte code subtask is stored in a shared library and, at runtime, a runtime loader uses the pointer to identify the location of the byte code subtask in order to translate the byte code subtask.

Abstract: Asynchronously traversing a disjoint linked data structure is presented. A synergistic processing unit (SPU) includes a handler that works in conjunction with a memory flow controller (MFC) to traverse a disjoint linked data structure. The handler compares a search value with a node value, and provides the MFC with an effective address of the next node to traverse based upon the comparison. In turn, the MFC retrieves the corresponding node data from system memory and stores the node data in the SPU's local storage area. The MFC stalls processing and sends an asynchronous event interrupt to the SPU which, as a result, instructs the handler to retrieve and compare the latest node data in the local storage area with the search value. The traversal continues until the handler matches the search value with a node value or until the handler determines a failed search.

Abstract: A proxy service provides telephone conferencing services and personal telephony services. Users can participate in the conference by connecting through different types of networks using a device having one or more types of communication lines connected to the proxy service. A primary user can request the proxy to call each one of the users and establish the conference. The primary user may accomplish this through a data line using data requests or though a voice line using voice requests. Typically, the primary user provides a telephone number for each user. The primary user can also provide with specific times of when calls should be placed, identification information for each user, the type of conference, and other conference parameters.

Abstract: A selection accelerator in topology views is presented. A user uses a topology view to manage a computer network whereby the topology view includes a plurality of nodes and their relationships that correspond to computer network components. When a user selects a primary node, processing identifies related nodes, and displays a relationship identifier next the related nodes, such as a hierarchal level corresponding to the primary node. By viewing the relationship identifiers, the user is able to depress a key to select a plurality of related nodes based upon their relationships. In addition, the user is able to request an invert select which informs processing to select nodes related to the primary node which are not currently selected.

Abstract: A system and method for grouping processors is presented. A processing unit (PU) initiates an application and identifies the application's requirements. The PU assigns one or more synergistic processing units (SPUs) and a memory space to the application in the form of a group. The application specifies whether the task requires shared memory or private memory. Shared memory is a memory space that is accessible by the SPUs and the PU. Private memory, however, is a memory space that is only accessible by the SPUs that are included in the group. When the application executes, the resources within the group are allocated to the application's execution thread. Each group has its own group properties, such as address space, policies (i.e. real-time, FIFO, run-to-completion, etc.) and priority (i.e. low or high). These group properties are used during thread execution to determine which groups take precedence over other tasks.

Abstract: A system and method for concurrent WLAN and WPAN wireless modes from a single device is presented. A client uses a Wi-Fi device's infrastructure mode to communicate in a WLAN environment and, during idle WLAN times, uses the Wi-Fi device's adhoc mode to communicate in a WPAN environment. The Wi-Fi device uses a watchdog timer to switch between infrastructure mode and adhoc mode. When the client's Wi-Fi device switches to infrastructure mode, the client's Wi-Fi device uses an infrastructure register and an infrastructure device driver to transfer data over the WLAN environment. Likewise, when the client's Wi-Fi device switches to adhoc mode, the client's Wi-Fi device uses an adhoc register and an adhoc device driver to transfer data over the WLAN environment. The client uses a code shim to act as a virtual device driver at times when either the infrastructure device driver or the adhoc device driver is inactive.

Abstract: A system and method is provided for delaying a priority boost of an execution thread. When a thread prepares to enter a critical section of code, such as when the thread utilizes a shared system resource, a user mode accessible data area is updated indicating that the thread is in a critical section and, if the kernel receives a preemption event, the priority boost that the thread should receive. If the kernel receives a preemption event before the thread finishes the critical section, the kernel applies the priority boost on behalf of the thread. Often, the thread will finish the critical section without having to have its priority actually boosted. If the thread does receive an actual priority boost then, after the critical section is finished, the kernel resets the thread's priority to a normal level.

Abstract: A memory coherence protocol is provided for using cache line access frequencies to dynamically switch from an invalidation protocol to an update protocol. A frequency access count (FAC) is associated with each line of data in a memory area, such as each cache line in a private cache corresponding to a CPU in a multiprocessor system. Each time the line is accessed, the FAC associated with the line is incremented. When the CPU, or process, receives an invalidate signal for a particular line, the CPU checks the FAC for the line. If the CPU, or process, determines that it is a frequent accessor of a particular line that has been modified by another CPU, or process, the CPU sends an update request in order to obtain the modified data. If the CPU is not a frequent accessor of a line that has been modified, the line is simply invalidated in the CPU's memory area.

Abstract: A system and method for accessibility content copyright permission is presented. A copyright server receives a copyright request from a requestor, such as a portal server. The copyright request corresponds to a user requesting a particular content to be transcoded. The copyright server identifies content copyright permissions associated with the requested content that indicate whether it is permissible to transcode the requested content. If the copyright server does not locate content copyright permissions associated with the requested content, the copyright server identifies the owner of the content and sends a message to the content owner requesting content copyright permission. The copyright server receives a response from the content owner, stores the response on a local storage area, and forwards the response to the requestor. The content copyright permissions may include an amount of a transcoding fee that the content owner requires in order to transcode the requested content.

Abstract: A system and method for a high frequency stall design is presented. An issue unit includes a first instruction stage, a second instruction stage, and issue control logic. During a first instruction cycle, the issue unit performs two tasks, which are 1) the instructions located in the first instruction stage are moved to a second instruction stage, and 2) the issue control logic determines whether to issue or stall the instructions that are moved to the second instruction stage based upon their particular instruction attributes and the issue control unit's previous state. During a second instruction cycle that immediately follows the first instruction cycle, the second instruction stage's instructions are either issued or stalled based upon the issue control logic's decision from the first instruction cycle.

Abstract: A method, computer program product, and information handling system for generating loop code to execute on Single-Instruction Multiple-Datapath (SIMD) architectures, where the loop contains multiple non-stride-one memory accesses that operate over a contiguous stream of memory is disclosed. A preferred embodiment identifies groups of isomorphic statements within a loop body where the isomorphic statements operate over a contiguous stream of memory over the iteration of the loop. Those identified statements are then converted into virtual-length vector operations. Next, the hardware's available vector length is used to determine a number of virtual-length vectors to aggregate into a single vector operation for each iteration of the loop. Finally, the aggregated, vectorized loop code is converted into SIMD operations.

Abstract: A processor uses start point fractional values during view screen segment computations that start a view screen segment's computations a particular distance away from a down point. This prevents an excessive sampling density during image generation without wasting processor resources. The processor identifies a start point fractional value for each view screen segment based upon each view screen segment's identifier, and computes a view screen segment start point for each view screen segment using the start point fractional value. View screen segment start points are “tiered” and are a particular distance away from the down point. This stops the view screen segments from converging to a point of severe over sampling while, at the same time, providing a pseudo-uniform sampling density.

Abstract: A system and method for identifying compatible threads in a Simultaneous Multithreading (SMT) processor environment is provided by calculating a performance metric, such as cycles per instruction (CPI), that occurs when two threads are running on the SMT processor. The CPI that is achieved when both threads were executing on the SMT processor is determined. If the CPI that was achieved is better than the compatibility threshold, then information indicating the compatibility is recorded. When a thread is about to complete, the scheduler looks at the run queue from which the completing thread belongs to dispatch another thread. The scheduler identifies a thread that is (1) compatible with the thread that is still running on the SMT processor (i.e., the thread that is not about to complete), and (2) ready to execute. The CPI data is continually updated so that threads that are compatible with one another are continually identified.

Abstract: A system and method for installing and retaining an input/output connector without tools is presented. A user removes a module from a computer system in order to add or remove a transceiver. The module includes a housing and a front bezel, whereby a bezel latch attaches the front bezel to the housing. The user depresses the bezel latch to remove the front bezel from the housing. As a result, a retention beam is exposed on the housing that secures transceivers to a circuit board. The user unlatches the retention beam, inserts a transceiver onto a mounting area, and latches the retention beam. The retention beam applies pressure to the transceiver, which results in a coupling of the transceiver to a circuit board included in the housing. In turn, the user attaches the front bezel to the housing via the bezel latch and reinserts the module into the computer system.

Abstract: A system and method that uses a text-based script file to capture a circuit design and allows a circuit designer to manipulate the script file. The circuit designer can add, delete, or move components using various tags and commands that are stored in the script file. When the design is complete, or ready to be tested, the script file is processed creating a layout representation file that is readable by a graphics-based circuit design tool.

Abstract: A system and method for improved scroll mouse operation is presented. A user operates a computer mouse, which includes a scroll ring that functions as a middle mouse button. During operation, the user configures a scroll suppression manager to discard a particular number of scroll commands when the user moves the computer mouse's scroll ring. The user specifies a number of scroll commands to discard when the computer mouse's pointer location is positioned over particular mouse-over conditions, such as a web page link or a drop down menu. Once the scroll suppression manager has discarded the user-specified number of scroll commands, the scroll suppression manager processes subsequent scroll commands until the user stops scrolling or the user selects an object on the user's computer screen.

Abstract: A system and method is provided for reducing memory leaks in virtual machine programs, such as those encountered in programs running in the Java Virtual Machine (JVM) environment. A compiler, such as a Java Just-In-Time (JIT) compiler, is used to identify the last use of an variable and, subsequent to the program statement where the last use occurs, insert a nullification statement. The nullification statement nullifies the variable so that it no longer references an object stored in a garbage collected heap. Variables in a program are identified in the activation records of the program. The nullification statement, when executed, severs the link between the program and the objects stored in the garbage-collected heap so that the program is no longer seen as a “root” for the object, often enabling the garbage collector to reclaim memory occupied by the object sooner.

Abstract: A JTAG-compliant device is configured to receive data through the control (TMS) line in addition to being configured to receive data through the input (TDI) line. A burst-write instruction is made the active instruction, extending the capability of the test access protocol (TAP) controller such that the TAP controller can receive data into a data register while the TAP controller is in certain states. In some states, the TAP controller receives and stores a bit only from the input line. In other states, the TAP controller receives and stores a bit from the input line, and in addition, the TAP controller receives and stores a bit from the control line. The TAP controller may store the received bits by shifting the received bits into the least significant bit of a data register.

Abstract: A system and method for organizational risk based on personnel planning factors is provided. Each employee has an employee profile data area that is used to store planning data and actual data corresponding to the employee. Planning data includes risk analysis data, compensation data, and development planning data. Actual data includes current compensation data and performance data. Inhibitors and motivators corresponding to employees is used to determine a flight risk that pertains to the employee. A contribution level, corresponding to the employee's contribution to the organization, is analyzed along with the flight risk to determine a risk quadrant that is assigned to the employee. Managers can select a risk quadrant and obtain information about common inhibitors and motivators. Incentive data, such as stock options, compensation, and awards, is planned in light of an employee's risk quadrant in order to motivate high contributors to remain with the organization.