Patents Represented by Law Firm Whitham, Curtis & Witham
  • Patent number: 5886320
    Abstract: The amount of laser energy absorbed by a dielectric material during laser fuse blow is increased by changing the angle at which the laser is transmitted. An increased angle of incidence will result in increased energy absorption at the top and edge of the device. This technique may eliminate the need for second pass fuse blow.
    Type: Grant
    Filed: September 3, 1996
    Date of Patent: March 23, 1999
    Assignee: International Business Machines Corporation
    Inventors: Antonio R. Gallo, Pei-Ing P. Lee
  • Patent number: 5872907
    Abstract: A mechanism for handling processing errors in a computer system. The mechanism includes a first means for processing a stream of instructions, second means for detecting an error caused by a timing dependant defect and occurring during processing of the instruction by the first means and third means for varying the instruction processing cycle time of the first means in response to the detection of the error by the second means, and for causing the second means to retry at least a portion of the instruction subsequent to the varying. In a preferred embodiment, the mechanism uses the variable frequency oscillator, controlled by recovery code, to increase the system clock cycle time by a specified time (Textend) following what has been determined to be a critical fail and after normal retry has been unsuccessful. The increased cycle time extends the net slack and, thereby, provides tolerance to certain AC (path delay) defects which have developed in any cycle time dependant latch to latch segment.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: February 16, 1999
    Assignee: International Business Machines Corporation
    Inventors: Kevin Roy Griess, Ann Caroline Merenda, Donald Lloyd Pierce
  • Patent number: 5827623
    Abstract: In a halftone type phase shift photomask, a patterned halftone layer is formed on a transparent substrate, and a light screen layer is formed on the halftone layer. A part of a mask pattern is changed from opaque to halftone, thus improving the resist pattern fidelity.
    Type: Grant
    Filed: October 30, 1996
    Date of Patent: October 27, 1998
    Assignee: NEC Corporation
    Inventors: Shinji Ishida, Tadao Yasuzato
  • Patent number: 5610441
    Abstract: Polysilicon in a trench is etched at an angle to produce a conductor within the trench that has shape characteristics which approximate the shadow of the side wall of the trench closest the beam source. Specifically, when the first side wall is closest to the beam source and the second side wall is furthest from the beam source, the polysilicon on the first side wall is almost as high as the first side wall, while the polysilicon on the more exposed side wall is considerably lower than the first side wall and approximates the shadow of the first side wall on the second side wall relative to the beam. The polysilicon in the trench may be in the shape of a solid angled block approximating the shadow line from the top of side wall to the shadow line on side wall however, it is preferred that the polysilicon take the form of a conformal layer in trench prior to etching such that the polysilicon ultimately has an angled "U" shape which approximates the shadow line.
    Type: Grant
    Filed: May 19, 1995
    Date of Patent: March 11, 1997
    Assignee: International Business Machines Corporation
    Inventors: Daniel A. Carl, Donald M. Kenney, Walter E. Mlynko, Son V. Nguyen
  • Patent number: 5497334
    Abstract: A computer based system and method is provided for generating a design verification scheme for a hierarchical circuit design. A set of directives received describing design checks to be performed on a hierarchical circuit design. The directives are functionally decomposed into primitive functions required to perform them. A primary iteration level is established for each directive, and a data flow dependency is determined for the directives. Based on the data now dependency, a sequence or operations is organized. The operations are optimized in one or more ways to improve the efficiency of the design verification process. The optimized operations are coded into an application program which executes in a computer processor. The application program accesses the VLSI circuit design under review and performs the directives using the data structures allocated during schema generation.
    Type: Grant
    Filed: February 19, 1993
    Date of Patent: March 5, 1996
    Assignee: International Business Machines Corporation
    Inventors: Philip J. Russell, Glenwood S. Weinert