Patents Represented by Law Firm Whitham & Marhoefer
  • Patent number: 5301134
    Abstract: A digital filter circuit has two decimation filters, a first and a second, for performing two decimations with respect to a digital data of a predetermined sampling rate. The first decimation filter has a function of producing processing signals for a filter coefficient of the second decimation filter and providing such operational signal to the second decimation filter. Since the output of the first decimation filter is not a coded numeral value but is an output in the form of a processing signal for the filter coefficient of the second decimation filter, the first decimation filter can take the form of a decoder circuit and not an operational circuit and the second decimation filter can be simpler than that having a multiplier circuit of a conventional circuit. The scale of the overall circuit can be reduced and this contributes in the enhancement of high integration of large scale integrated circuits (LSIs), in the scaling down of chip areas and in reducing the manufacturing cost.
    Type: Grant
    Filed: January 30, 1992
    Date of Patent: April 5, 1994
    Assignee: NEC Corporation
    Inventor: Yuichi Maruyama
  • Patent number: 5300813
    Abstract: A contact structure for a semiconductor device having a first refractory metal layer formed only at the bottom of a contact hole. The first refractory metal is selected from a group comprising titanium (Ti), titanium alloys or compounds such as Ti/TiN, tungsten (W), titanium/tungsten (Ti/W) alloys, or chromium (Cr) or tantalum (Ta) and their alloys or some other suitable material. A low resistivity layer comprising a single, binary or ternary metalization is deposited over the first refractory metal layer in the contact hole by a method such as PVD using evaporation or collimated sputtering. The low resistivity layer has side walls which taper inwardly toward one another with increasing height of the layer and the low resistivity layer does not contact the side walls of the contact hole. The low resistivity layer may be Al.sub.x Cu.sub.y (x+y=1; x.gtoreq.0, y.gtoreq.0), ternary alloys such as Al-Pd-Cu or multicomponent alloys such as Al-Pd-Nb-Au.
    Type: Grant
    Filed: February 26, 1992
    Date of Patent: April 5, 1994
    Assignee: International Business Machines Corporation
    Inventors: Rajiv V. Joshi, Jerome J. Cuomo, Hormazdyar M. Dalal, Louis L. Hsu
  • Patent number: 5300827
    Abstract: An NTL (Non-Threshold Logic) NOR logic circuit exhibits a small signal swing, effected by establishing a pseudo threshold level by utilizing a low voltage power supply and a combination of NPN bipolar devices arranged to provide an essentially noise immune circuit having high DC gain and high AC noise tolerance.
    Type: Grant
    Filed: July 27, 1992
    Date of Patent: April 5, 1994
    Assignee: International Business Machines Corporation
    Inventors: Michel S. Michail, James L. Walsh
  • Patent number: 5301012
    Abstract: Sensitivity and resolution of an automated inspection system are improved and data processing loads for defect detection are reduced, increasing inspection speed, by fully illuminating an area corresponding to a nominal feature shape formed on a surface. Scanning of the illuminated area thus provides resolution of defects far smaller than the area of the illuminated spot. A preferred application of this automated inspection system is for the high speed screening of lamina or substrates having a pattern of through-holes formed therein, particularly for the formation of via connections therein. Screening for insufficient clear area of through-holes is done simply by applying a threshold to the output representing the amount of illumination transmitted and preferably reflected through the through-hole.
    Type: Grant
    Filed: October 30, 1992
    Date of Patent: April 5, 1994
    Assignee: International Business Machines Corporation
    Inventors: Mark R. King, Wendell B. Scism
  • Patent number: 5301124
    Abstract: A pattern is aligned and exposed with a lithography system so that chips larger than the deflection field can be formed by exposing M.times.N fields in a mosaic pattern. The method corrects the deflection field to compensate for the orientation of a previous pattern on a substrate and compensates for errors due to height caused by the beam landing non perpendicular to the target. Two basic procedures disclosed are called "3-mark" which are only applicable to 2.times.2 arrays of fields, and "M.times.N" which covers the general situation, but with slightly less accuracy.
    Type: Grant
    Filed: September 9, 1993
    Date of Patent: April 5, 1994
    Assignee: International Business Machines Corporation
    Inventors: Ken T. Chan, Donald E. Davis, William A. Enichen, Cecil T. Ho, Edward V. Weber, Guenther Langner
  • Patent number: 5301340
    Abstract: A parallel computer architecture incorporates a new register file organization for parallel ALUs that provides improved performance due to reduced off-chip crossings and locally higher density. Each ALU is provided with its own, smaller register file located on the ALU chip. Data written by one ALU is "broadcast" to all the "local" register files. This arrangement of "local" register files minimizes the number of pins required and, using very large scale integration (VLSI) techniques, high densities can be achieved. These "local" register files eliminate off-chip delays, and performance is further enhanced by the shorter wire lengths in the local register files.
    Type: Grant
    Filed: October 31, 1990
    Date of Patent: April 5, 1994
    Assignee: International Business Machines Corporation
    Inventor: Peter W. Cook
  • Patent number: 5301001
    Abstract: An extrinsic Fizeau fiber optic sensor comprises a single-mode fiber, used as an input/output fiber, and a multimode fiber, used purely as a reflector, to form an air gap within a silica tube that acts as a Fizeau cavity. The Fresnel reflection from the glass/air interface at the front of the air gap (reference reflection) and the reflection from the air/glass interface at the far end of the air gap (sensing reflection) interfere in the input/output fiber. The two fibers are allowed to move in the silica tube, and changes in the air gap length cause changes in the phase difference between the reference reflection and the sensing reflection. This phase difference is observed as changes in intensity of the light monitored at the output arm of a fused biconical tapered coupler. The extrinsic Fizeau fiber optic sensor behaves identically whether it is surface mounted or embedded, which is unique to the extrinsic sensor in contrast to intrinsic Fabry-Perot sensors.
    Type: Grant
    Filed: February 12, 1992
    Date of Patent: April 5, 1994
    Assignee: Center For Innovative Technology
    Inventors: Kent A. Murphy, Michael F. Gunther, Ashish M. Vengsarkar, Richard O. Claus
  • Patent number: 5298871
    Abstract: A microcomputer having a signal generating circuit which generates pulse width modulation signals defined by a carrier wave, and which controls controlled portions according to pulse width modulating signals. The signal generating circuit comprises a carrier wave defining timer which outputs a value varying the same as a waveform providing a carrier wave, a control register which controls the time period of the timer, a reload register which holds a count value, control blocks which generate pulse width modulation signals according to the value of the timer and the count value of the reload register.
    Type: Grant
    Filed: December 28, 1992
    Date of Patent: March 29, 1994
    Assignee: NEC Corporation
    Inventor: Kazunari Shimohara
  • Patent number: 5299282
    Abstract: A message synthesizer circuit includes a compressed message data memory as a message source for storing a plurality of compressed message data of message, each corresponding to a message code specifying a message to be emitted as a synthesized message. An input message code selector converts a message code signal into the count of a ring counter by taking, as its inputs, a count output emitted from the ring counter, with the total number of these compressed message data corresponding to its maximum count number, a message code signal for specifying a message to be emitted and an input message code selector signal for setting a randomizing condition for randomly altering the message code signal. The system controller reads out the compressed message data corresponding to the random message code from the compressed message data memory, which is then converted into a specific synthesized message.
    Type: Grant
    Filed: January 31, 1992
    Date of Patent: March 29, 1994
    Assignee: NEC Corporation
    Inventor: Kazuhiko Tabei
  • Patent number: 5299299
    Abstract: A figure filling device fills a figure in memory defined by X-Y coordinate scan line by scan line with reference to a specified pattern. In the filling of a new scan line, the coordinate data for the ends of the new scan line, for the ends of the previously processed scan line and for the reference point of the previous pattern are subjected to a certain processing so that the coordinate data for the reference point of the new pattern is determined. The filling device determines the address in the memory corresponding to the coordinates for the reference point of the new pattern and the address on the memory corresponding to the coordinates for the ends of the new scan line. A filling pattern is read out of the pattern address in the memory and the scan line data is read out of the scan line address on the memory so that they are subjected to a predetermined operation. The result is written to the scan line address.
    Type: Grant
    Filed: September 3, 1992
    Date of Patent: March 29, 1994
    Assignee: NEC Corporation
    Inventor: Mitsurou Ohuchi
  • Patent number: 5297711
    Abstract: A perforated web transporting and separating system in which two longitudinally spaced drive mechanisms move the web, an upstream drive and a downstream drive. A platen supports and guides the web; the platen has two sections, and one section can be slightly rotated in the plane of the web with respect to the other section. In separating the web along a row of perforations, the web is driven to a point where the row of perforations is between the platen sections. The upstream drive is stopped while the downstream drive continues to attempt to drive the web, creating a tension in the web across the row of perforations. With the web in tension, one section of the guide platen is articulated relative to the other, tearing the web along the tensioned row of perforations.
    Type: Grant
    Filed: May 24, 1993
    Date of Patent: March 29, 1994
    Assignee: Miltope Corporation
    Inventor: Eduard Kogan
  • Patent number: 5299190
    Abstract: A method of scheduling requests from N.sup.2 input queues to N outputs is applied to an N.times.N switch with each of the N input ports having N input queues, each of the N input queues for each of the N input ports corresponding to one of the N output ports. The method uses a request matrix with each row representing an input and each column representing an output. A bit in a given row and column of the matrix thus represents a request from a corresponding input port for connection to a corresponding output port. Diagonal service patterns are used to overlay the request matrix to determine which requests are to be serviced. A sequence of diagonal service patterns for each of K time slots is used in such a manner that a fairer and yet still computationally simple scheduler provides guaranteed service within the 2N-1 time slots.
    Type: Grant
    Filed: December 18, 1992
    Date of Patent: March 29, 1994
    Assignee: International Business Machines Corporation
    Inventors: Richard O. LaMaire, Dimitrios N. Serpanos
  • Patent number: 5297618
    Abstract: A heatsink is provided which can be removably secured in a heat transfer relationship to an electronic module or package by an epoxy type adhesive. A screw is provided through one end of the heatsink directly over an edge of the module sealing cap. To remove the heatsink from the module, the screw is turned down to contact the cap. Continued turning causes a prying force between the cap and the module whereby the heatsink is peeled away and removed from the module. All forces are directed between the cap and the module thereby eliminating harmful stress from being transmitted through the solder ball connections and to a supporting circuit card.
    Type: Grant
    Filed: December 31, 1992
    Date of Patent: March 29, 1994
    Assignee: International Business Machines Corporation
    Inventors: John R. Behun, Joseph A. Benenati
  • Patent number: 5298799
    Abstract: The provision of a clock chopper, pulse shaper, single-shot circuit with NOR gates a delay path and a set-reset latch. In response to a high input (for example) to a first NOR gate, the circuit output goes high and remains high until the output of the one NOR gate propagates through the delay one input of a second NOR gate whose other input is coupled to a set-reset latch. When the delayed output of the first NOR gate reaches the input of the second NOR gate, the circuit output falls, and the change in circuit output is fed back to reset the latch. The change in latch state changes the output state of the second NOR gate and resets the circuit for next input.
    Type: Grant
    Filed: December 31, 1992
    Date of Patent: March 29, 1994
    Assignee: International Business Machines Corporation
    Inventors: David B. Cochran, Kathleen M. Owczarski
  • Patent number: 5298784
    Abstract: An improved antifuse uses metal penetration of either a P-N diode junction or a Schottky diode. The P-N junction, or Schottky diode, is contacted by a diffusion barrier such as TiN, W, Ti-W alloy, or layers of Ti and Cr, with a metal such as Al. Al-CU alloy, Cu, Au, or Ag on top of the diffusion barrier. When this junction is stressed with voltage pulse producing a high current density, severe joule heating occurs resulting in metal penetration of the diffusion barrier and the junction. The voltage drop across the junction decreases by about a factor of ten after the current stress and is stable thereafter. Alternatively, a shallow P-N junction in a silicon substrate is contacted by a layer of metal that forms a silicide, such as Ti, Cr, W, Mo, or Ta. Stressing the junction with a voltage pulse to produce a high current density results in the metal penetrating the junction and reacting with the substrate to form a silicide.
    Type: Grant
    Filed: March 27, 1992
    Date of Patent: March 29, 1994
    Assignee: International Business Machines Corporation
    Inventors: Jeffrey P. Gambino, Dominic J. Schepis, Krishna Seshan
  • Patent number: 5296753
    Abstract: A comparator circuit of the present invention comprises first and second bipolar type transistors for amplification of the input and reference voltages and first to fourth MOS type transistors for comparison and latching of the amplified input and reference voltages according to the first driving signal and fifth and sixth MOS type transistors provided between the first/second bipolar transistors and the first to fourth MOS type transistors for turning on and off according to the second driving signal, all on a single stage.
    Type: Grant
    Filed: January 19, 1993
    Date of Patent: March 22, 1994
    Assignee: Nec Corporation
    Inventor: Naotoshi Nakadai
  • Patent number: 5296227
    Abstract: A decoy which includes the attraction, aggregation and attachment components of bont tick pheromones is used to attract hungry male, female, and nymph bont ticks to a location where an acaricide can kill the ticks. The decoy can be disk shaped and can be attachable to the hair or fur of an animal. The decoy may also be in the form of a tail band decoy where the decoy is used to dispense the pheromones and acaricide on those portions of the host animal's body not normally protected by grooming mechanisms.
    Type: Grant
    Filed: December 13, 1991
    Date of Patent: March 22, 1994
    Assignees: Old Dominion University, The University of Florida
    Inventors: R. A. I. Norval, Daniel E. Sonenshine, Martin I. Meltzer, Michael J. Burridge
  • Patent number: 5297124
    Abstract: The invention relates to an emulator system which allows a disk drive to transparently emulate a tape drive. The system converts sequential format tape records into block format disk records and visa-versa. Identification and conversion information for each of the data records are stored in directory located on the outermost sectors of the disk. Within each directory are a plurality of entries each containing four fields: TAPE RECORD NUMBER (TRN); DISK START ADDRESS (DSA); WORD COUNT (WC); and FLAG. These fields contain all of the necessary information required to map a tape formatted data record to a disk and thereafter retrieve the data record from the disk and convert it back to tape format.
    Type: Grant
    Filed: April 24, 1992
    Date of Patent: March 22, 1994
    Assignee: Miltope Corporation
    Inventors: Barry Plotkin, Daniel C. Ginsburg
  • Patent number: 5297249
    Abstract: A set of hypermedia linking services enable client applications to incorporate hypermedia capabilities in an open system architecture. The users are provided with a consistent hypermedia interface completely managed by the hypermedia services and not by the client application itself. The graphical user interface includes methods for menu handling, dialog box presentation and pointing device message handling, e.g., mouse message handling. Normal hypermedia activities such as object management, object creation, object deletion and object modification is provided. In addition, an open system searching mechanism is provided to satisfy broad non-context requests for information by the user without sacrificing the advantages of an open hypermedia environment.
    Type: Grant
    Filed: October 31, 1990
    Date of Patent: March 22, 1994
    Assignee: International Business Machines Corporation
    Inventors: Keith Bernstein, John A. Stephens
  • Patent number: 5295389
    Abstract: A thermal conductivity detector includes a thin diaphragm, a heat-generating portion, and a pair of boundary holes. The thin diaphragm is obtained by forming a space in part of a base. The heat-generating portion is formed in the diaphragm. The boundary holes are formed to surround the heat-generating portion.
    Type: Grant
    Filed: July 31, 1992
    Date of Patent: March 22, 1994
    Assignee: Yamatake-Honeywell Co., Ltd.
    Inventors: Mitsuhiko Nagata, Shoji Kamiunten, Tatsuyuki Uchida, Misako Seita