Abstract: A fixed point signal processor includes a general register of "2n+.alpha."-bit width coupled to an arithmetic and logic unit (ALU) of "2n+.alpha."-bit width, a first data memory of "n"-bit width, and a first selection circuit for extending the "n"-bit width data to "2n+.alpha."-bit width to output the extended data to the general register. The first selection circuit selects continuous "n" bits from the "2n+.alpha."-bit width data held in the general register, to output the selected continuous "n" bits to the data memory. A second data memory receives the "2n+.alpha."-bit width data held in the general register for saving a plurality of items of "2n+.alpha."-bit width data, and a register indicates a head position of continuous "n" bits in the "2n+.alpha."-bit width data held in the second data memory. From the "2n+.alpha.

Abstract: An interface for coupling a standard telephone set to a distributed digital network for allowing digital voice communication over the distributed network such that the utilization of the distributed network is wholly transparent to the user. An interface is provided for each telephone set. Each interface includes a state machine, a coder/decoder and a digital tone generator. The state machine is responsive to analog control signals from the telephone set to generate digital control signals to be transmitted over the distributed network. The state machine is also responsive to digital control signals to control the digital waveform generator to generate supervisory tones which are relayed to the user by the telephone set.