Abstract: A method of detecting a signal in radio frequency identification (RFID) transponder (FIG. 1) is disclosed. The method includes receiving a signal (FIG. 7) having a first time in a first logic state (high) and having a second time in a second logic state (low). A weight (700, 702) is determined in response to the first time and the second time. An output signal (from A2D) is produced in response to the weight and one of the first and second logic states.

Abstract: Methods and apparatus to minimize saturation in a ground fault detection device are disclosed. An example method includes connecting a capacitor simulator to a node of the ground fault detector device to prevent saturation, and monitoring power-line conductors for ground fault conditions with the ground fault detector device. An example apparatus to simulate a saturation capacitance in a ground fault device includes a sense coil induced by power-line conductors, and at least one of an amplifier or a current detector including an input connected to the sense coil and an output connected to a ground fault detector. The example apparatus also includes a saturation capacitor simulator connected to a node of at least one of the amplifier or the current detector to prevent saturation.

Abstract: An electronic device is provided which comprises circuitry for DC-DC conversion configured to switch an inductor current through an inductor using slope compensation, wherein the circuitry comprises a slope compensation stage configured to generate a slope compensation signal as a function of an switching frequency of the DC-DC conversion and an input voltage of the DC-DC converter.

Abstract: A method and device for writing a binary count of a length n to a memory having a limited number of write cycles, a physical storage location of bits (R-bits) of the count in the memory are periodically changed, fixed bits of the count are stored at fixed physical storage locations, and a bit value pattern of the fixed bits is used as an indicator for the physical storage locations of the changing bits (R-bits).

Abstract: A system for managing AC energy harvested from a harvesting device (1) including a coil (4) including switching circuitry (S1-S4) coupled between first (7A) and second (7B) terminals of the coil. The switching circuitry includes first (S1), second (S2), third (S1), and fourth (S4) switches. A switch controller (17) closes the second and fourth switches to allow build-up of current (ILh) in the coil, opens one of the second and fourth switches, and closes a corresponding one of the third and first switches in response to the built-up inductor current reaching a predetermined threshold value (Ihrv) to steer the built-up inductor current through the corresponding one of the third and first switches to a current-receiving device (24 and/or RL, CL).

Abstract: One embodiment of the invention includes a regulator circuit that regulates a substantially constant magnitude of an output voltage at an output node. The circuit includes a master stage configured to set a first threshold voltage and a second threshold voltage. The first threshold voltage can have a magnitude that is greater than the second threshold voltage. The circuit also includes a charging follower stage configured to conduct a first current from a first power rail to the output node. The first current can increase in response to a transient decrease of the output voltage relative to the first threshold voltage. The circuit further includes a discharging follower stage configured to conduct a second current from the output node to a second power rail. The second current can increase in response to a transient increase of the output voltage relative to the second threshold voltage.

Abstract: One embodiment of the invention includes a power supply system. The system includes at least one power switch configured to be activated and deactivated based on a duty-cycle of a respective at least one control signal to generate an output voltage. The system also includes a gate driver configured to generate the at least one control signal and to adjust a slew-rate of each pulse of the at least one control signal to substantially mitigate amplitude ringing at a switching node during a first rising-edge portion and to substantially mitigate conduction losses associated with the at least one power switch during activation and deactivation of the at least one power switch during a second rising-edge portion.

Abstract: Systems and methods for determining a state of charge (SOC) of an electrical energy storage device are disclosed. In one embodiment, a system is provided for determining the SOC of an electrical energy storage device comprises at least one memristor coupled in series with the electrical energy storage device to monitor charge current and discharge current of the electrical energy storage device. The system also includes a readout controller configured to determine the SOC of the electrical energy storage device based on the resistance of the memristor.

Abstract: A system and method for measuring a temperature in at least one energy storage unit. The system includes at least one temperature sensor thermally coupled to the at least one energy storage unit, and a battery management controller in communication with the at least one temperature sensor. The battery management controller is configured to process a temperature of the at least one energy storage unit to obtain an internal temperature in the at least one energy storage unit.

Abstract: This invention relates to a transformer (1) for multi-output power supplies such as those commonly found in electronic equipment. The transformer comprises a magnetic core (3) and a plurality of windings (5, 7, 9) at least some of which are fractional windings, arranged about the magnetic core. The transformer comprises a dual transformer structure with a pair of transformers, a main transformer (11) and an auxiliary transformer (13). In a preferred embodiment, the main transformer and the auxiliary transformer are connected together. In this way, readily available magnetic components may be used in the construction of the transformer and the simple construction allows for a large cross-sectional area of transformer to be deployed so that reduced turn counts of windings may be used.

Abstract: Implementing a piecewise-polynomial-continuous function in a translinear circuit generally involves translinear elements that form translinear loops that are linked by a clamp transistor. A first translinear loop controls a first portion of the piecewise-polynomial-continuous function in a first area of operation. A second translinear loop controls a second portion of the piecewise-polynomial-continuous function in a second area of operation. When activated in the second area of operation, the clamp transistor draws current through one of the translinear elements without drawing current away from another translinear element of the translinear circuit.

Abstract: An active rectifier (12) couples a first input voltage (Vin1) to a first electrode of a first transistor (M3) having a second electrode coupled to an output (4) conducting an output voltage (Vout), and couples a second input voltage (Vin2) to a first electrode of a second transistor (M4) having a second electrode coupled to the output conductor. A first amplifier (A1) controls a voltage (V16) of a gate of the first transistor to maintain an input offset of the first amplifier between the first input voltage and the output voltage while the first input voltage exceeds the output voltage, and a second amplifier (A2) controls a voltage (V15) on a gate of the second transistor to maintain an input offset between the second input voltage and the output voltage while the first input voltage exceeds the output voltage. The input offsets prevent backflow of current from the output to either of the first electrodes when the first or second input is nearly equal to the output voltage.

Abstract: An LED driving element that can perform black line insertion display without increasing the clock frequency. LED driving element 11 has first and second shift registers 34a, 34b used for controlling the light-emitting elements on one side among the light-emitting elements arranged in two adjacent rows. In the normal mode, the first and second shift registers 34a, 34b are connected in series. In the image quality improvement mode, the first or second shift register is bypassed by short circuit line 30. In the normal mode, the light emission data are moved serially through the first and second shift registers 34a, 34b. In the image quality improvement mode, the light emission data are moved in only one shift register, that is, shift register 34a or 34b, so that black line insertion can be performed in the same rewriting time per row as in the normal mode without increasing the clock frequency.

Abstract: A method for providing a maximum power point tracking (MPPT) process for an energy generating device is provided. The method includes coupling a local converter to the energy generating device. A determination is made regarding whether the local converter is operating at or below a maximum acceptable temperature. A determination is made regarding whether at least one current associated with the local converter is acceptable. When the local converter is determined to be operating at or below the maximum acceptable temperature and when the at least one current associated with the local converter is determined to be acceptable, the MPPT process is enabled within the local converter.

Abstract: An adjustable compensation offset voltage is applied to a comparator to vary turn-off timing of a synchronous rectifier. A comparator output indicates when current through an inductor coupled to the synchronous rectifier should be approaching zero. If the synchronous rectifier is turned off before the current through the inductor reaches zero, the compensation offset voltage is adjusted to delay the synchronous rectifier turn-off for the next switching cycle. If the synchronous rectifier is turned off after the current through the inductor reaches zero, the compensation offset voltage is adjusted to advance the synchronous rectifier turn-off for the next switching cycle. An up/down counter, in conjunction with a digital to analog converter, may be used to provide the adjustment to the compensation offset voltage. The adjustable compensation offset voltage improves the accuracy of synchronous rectifier turn-off in relation to a zero inductor current, thereby improving power converter efficiency.

Abstract: An apparatus for and method of automatically tuning a voltage regulation control loop for a digitally controlled switch mode power supply is provided. The method includes determining a frequency response of the power stage and calculating an open loop transfer function from the frequency response. A correlated metric is defined based at least in part on the open loop transfer function, wherein the correlated metric is correlated to an expected disturbance in regulated output voltage from the digitally controlled switch mode power supply due to a change in load. New values for the open loop transfer function are calculated for a range of controller compensation parameters to minimize the correlated metric. These values are then applied to the digital controller for use in controlling the power supply.

Abstract: Systems and devices for ripple reduction in a DC/DC converter are presented. The disclosed systems and methods enable ripple reduction in discontinuous conduction mode (DCM) operation. In DCM, the inductor current peak to peak ripple may be reduced based on the load current. To achieve the reduction of the inductor peak to peak current ripple, a digital counter is used to count the time between consecutive PWM pulses. The digital output of the counter is used to control the pulse width modulation. As the digital output of the counter increases, the PWM on-time decreases. Since the PWM pulse is demanded by the load in DCM mode, the peak to peak inductor ripple is modulated by the counter, or, in turn, modulated by the load current.

Abstract: Various apparatuses and methods for detecting cell connection status of a multi-cell battery are disclosed herein. For example, some embodiments provide an apparatus for detecting cell connection status of a multi-cell battery. The apparatus includes a battery cell input for each cell, a cell connection status detector for each cell, and at least one comparator. Each of the cell connection status detectors is connected to a battery cell input and has a current-based status indicator output. The at least one comparator is connected to the current-based status indicator outputs. Each of the plurality of cell connection status detectors floats in a different supply voltage range. The at least one comparator is referenced to a lower voltage potential than at least one of the plurality of cell connection status detectors.

Abstract: Various systems, methods and apparatuses are provided herein for limiting power dissipation in a switch. As one example, a method for limiting power dissipation is disclosed. The method includes monitoring current through the switch, and based at least in part on detecting that the current is at least as great as a predetermined current limit, regulating the current to the predetermined current limit. The method also includes measuring an amount of power dissipated in the switch while the current is being regulated, and opening the switch when the amount of power has reached a predetermined power limit.

Abstract: An electronic device is provided that includes a protection circuit for a light-emitting device. The protection circuit comprises a first node adapted to be coupled to an anode of the light-emitting device and a second node adapted to be coupled to a cathode of the light-emitting device. A voltage detection stage is coupled between the first and second nodes. The voltage detection stage is adapted to detect an overvoltage condition between the first and second nodes. Furthermore, the protection circuit comprises a thyristor coupled with its anode to the first node, its cathode to the second node to the voltage detection stage. When the overvoltage condition is detected in normal operation the thyristor is controlled to open so that the current can flow through the thyristor.