Abstract: A method of fabricating a micromachine includes the step of constructing a low surface energy film on the micromachine. The micromachine is then rinsed with a rinse liquid that has a high surface energy, relative to the low surface energy film, to produce a contact angle of greater than 90.degree. between the low surface energy film and the rinse liquid. This relatively large contact angle causes any rinse liquid on the micromachine to be displaced from the micromachine when the micromachine is removed from the rinse liquid. In other words, the micromachine is dried by dewetting from a liquid-based process. Thus, a separate evaporative drying step is not required, as the micromachine is removed from the liquid-based process in a dry state. The relatively large contact angle also operates to prevent attractive capillary forces between micromachine components, thereby preventing contact and adhesion between adjacent microstructure surfaces.

Abstract: A dynamic logic signal repeater includes a complementary dynamic logic circuit with an input node to receive an input signal and an output node storing a precharge signal. The complementary dynamic logic circuit configuration, transistor sizing, and the use of a precharge driver results in a signal transition trip point for the precharge signal on the output node that is substantially equivalent to the signal transition trip point of a static logic circuit. Thus, the dynamic logic signal repeater has improved noise immunity. An evaluation locking transistor is connected to the complementary dynamic logic circuit and the output node. The evaluation locking transistor prevents the charging of the output node during a dynamic logic evaluation period.

Abstract: An optical scanning system includes a light source to generate a light beam. An oscillatory microelectromechanical system including a mirror deflects the light beam in a predetermined manner. The light source and microelectromechanical system are formed in a silicon substrate. Rotational shafts in the microelectromechanical system facilitate oscillatory movement of the mirror.

Abstract: A circuit for comparing a first digital word to a second digital word includes a precharge circuit to generate an initial match signal, an initial inverse match signal, and a virtual ground signal in response to an input clock signal and an inverse input clock signal. Each comparison circuit of a set of comparison circuits generates a computed match signal and a computed inverse match signal based upon a selected bit of the first digital word and a corresponding selected bit of the second digital word. A signal differential sensing circuit derives a match signal for the first digital word and the second digital word based upon the virtual ground signal, the input clock signal, the computed match signal, and the computed inverse match signal.

Abstract: A method for handling method calls in a client/server computer system includes the step of receiving at a server computer a method call generated by a client computer. The server computer then attempts to execute the method call and subsequently generates an exception. The exception is passed to the client computer. The client computer matches the exception to exceptions in an exception list stored in the client computer to obtain an exception object identifier. The exception object identifier is used to load exception code into the client computer. The exception code is then processed. Thus, the exception code need not be loaded at the time of generating the method call. Instead, it is only loaded when it is required at run time.

Abstract: An integrated circuit includes a first metal layer with first layer identification signal writing circuitry connections to produce first metal layer circuit identification signals. The integrated circuit also has a second metal layer with second layer identification signal writing circuitry connections to produce second metal layer circuit identification signals. Logic circuitry in the first metal layer has input connections to the first layer identification signal writing circuitry connections and the second layer identification signal writing circuitry connections. The logic circuitry combines the first metal layer circuit identification signals and the second metal layer circuit identification signals to produce a circuit identification number. The value of the circuit identification number can be changed by altering the first layer identification signal writing circuitry connectors or the second layer identification signal writing circuitry connections.

Abstract: Supported inorganic membranes capable of molecular sieving, and methods for their production, are provided. The subject membranes exhibit high flux and high selectivity. The subject membranes are substantially defect free and less than about 100 nm thick. The pores of the subject membranes have an average critical pore radius of less than about 5 .ANG., and have a narrow pore size distribution. The subject membranes are prepared by coating a porous substrate with a polymeric sol, preferably under conditions of low relative pressure of the liquid constituents of the sol. The coated substrate is dried and calcined to produce the subject supported membrane. Also provided are methods of derivatizing the surface of supported inorganic membranes with metal alkoxides. The subject membranes find use in a variety of applications, such as the separation of constituents of gaseous streams, as catalysts and catalyst supports, and the like.

Abstract: An apparatus and method for transferring data within a computer includes a first computer sub-system connected to a second computer sub-system. The first computer sub-system produces data that is passed to the second computer sub-system. The second computer sub-system includes error detection circuitry to identify an original error in the passed data. The original error is identified with a first error identification technique, such as an error correction code technique. The second computer sub-system also includes error perpetuation circuitry to perpetuate an error in the data as it is passed to another computer sub-system. The error perpetuation circuitry perpetuates the error according to a second error identification technique, such as a parity bit error technique. The original data error is thereby perpetuated by converting it to the error identification format used by the computer sub-system to which the data is transferred.

Abstract: A central processing unit with an external cache controller and a primary memory controller is used to speculatively initiate primary memory access in order to improve average primary memory access times. The external cache controller processes an address request during an external cache latency period and selectively generates an external cache miss signal or an external cache hit signal. If no other primary memory access demands exist at the beginning of the external cache latency period, the primary memory controller is used to speculatively initiate a primary memory access corresponding to the address request. The speculative primary memory access is completed in response to an external cache miss signal. The speculative primary memory access is aborted if an external cache hit signal is generated or a non-speculative primary memory access demand is generated during the external cache latency period.

Abstract: A power plant water chemistry analysis apparatus and method relies upon water chemistry sensors to obtain power plant water chemistry data characterizing the chemical activity of a power plant water system. An analytical model processor is used to generate model predictions for the power plant water system. A statistical data fitting processor selects screened data from the power plant water chemistry data that corresponds to the model predictions. The screened data is processed by an artificial intelligence processor to derive power plant water chemistry diagnostic information. The artificial intelligence processor includes an expert system, rule base, plant water chemistry system simulator, and pattern recognition module.