Patents Represented by Attorney, Agent or Law Firm William S. Francos
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Patent number: 8217587Abstract: The present invention relates to a low cost LED driver module comprising a switched-mode power supply (smps) having down-converting characteristics (11) which is controlled by a comparator (31). The comparator is hysteresis configured, which reduces ripple and transients in the LED current, and the module can be accomplished with inexpensive standard components.Type: GrantFiled: January 26, 2007Date of Patent: July 10, 2012Assignee: Koninklijke Philips Electronics N.V.Inventor: Georg Sauerlaender
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Patent number: 6690506Abstract: According to an illustrative embodiment of the present invention, a method for controlling an optical amplifier is disclosed. The illustrative method includes receiving a portion of an input signal to the optical amplifier; receiving a portion of an output signal from a first amplification stage; receiving a portion of an output signal of the optical amplifier; and adjusting the first amplification stage and a second amplification stage based on the received portions to substantially control the optical amplifier. According to another illustrative embodiment of the present invention, an optical amplifier includes a controller which receives a portion of an output signal from a first amplification stage and a portion of an output signal from the optical amplifier. The controller adjusts the first amplification stage and a second amplification stage based on the received portions of the signals.Type: GrantFiled: August 31, 2001Date of Patent: February 10, 2004Assignee: Corning IncorporatedInventors: Timothy Zahnley, Aravanan Gurusami, Timothy W. T. Qian, Muhidin Lelic
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Patent number: 6541394Abstract: A method for making an oxide layer on a silicon substrate produces an oxide layer including graded portions with greatly reduced stress. The method includes growing a first oxide portion over a substrate by upwardly ramping the substrate to a first temperature lower than a SiO2 viscoelastic temperature. Thereafter a second oxide portion is grown between the first oxide portion and the silicon substrate by exposing the silicon substrate to an oxidizing ambient at a second temperature higher than the SiO2 viscoelastic temperature. The second oxide portion may have a thickness in a range of about 25 to 50% of a total thickness of the graded oxide layer.Type: GrantFiled: January 11, 2000Date of Patent: April 1, 2003Assignee: Agere Systems Guardian Corp.Inventors: Yuanning Chen, Sailesh Mansinh Merchant, Pradip Kumar Roy
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Patent number: 6271596Abstract: The present invention relates to a conductive plug capacitor and method of making for use in multi-level integrated circuit structures. In one embodiment, a tungsten plug is formed in a window in a dielectric layer and thereafter a cavity is formed in the plug. This cavity in the plug may serve as the lower electrode for the capacitor, with a layer of dielectric deposited in the cavity and a top metal electrode deposited on the dielectric layer. An alternative embodiment makes use of not only the inner cavity surfaces of the cavity in the tungsten plug, but also the outer sidewalls of the tungsten plug. To this end, after formation of the tungsten plug heading the cavity formed therein, a partial etchback of the dielectric layer in which the tungsten plug is formed is effective. The capacitor dielectric is then deposited on the sidewalls, the top surface and the interior of the cavity of the tungsten plug thereby increasing the area and thereby the over capacitance.Type: GrantFiled: April 15, 1999Date of Patent: August 7, 2001Assignee: Agere Systems Guardian Corp.Inventor: Glenn B. Alers
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Patent number: 6188607Abstract: An integrated circuit has a memory array comprising memory devices formed in a multiplicity of electrically isolated semiconductor regions that share a common set of bit lines. A given semiconductor region, typically a tub, is biased to a given voltage if a memory cell formed in that tub is accessed for a write operation, and biased to another voltage at other times. Although there may be many memory devices along the same bit line, during programming only the memory devices in the selected tub will be disturbed by the tub bias. Other memory devices residing in unselected tubs are protected against the bit line disturb. The present technique is especially advantageous when used with flash EEPROM memory cells that utilize secondary electron injection to assist in programming the cells.Type: GrantFiled: August 4, 1999Date of Patent: February 13, 2001Assignee: Lucent Technologies Inc.Inventor: Chun Chen
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Patent number: 6140222Abstract: An integrated circuit and its method of formation are disclosed. The circuit utilizes a spin-on glass as an interlevel dielectric. Above and below the spin-on glass is located a phosphorous doped dielectric. The doped dielectric prevents sodium from becoming mobile under the influence of subsequently applied electric fields.Type: GrantFiled: July 21, 1995Date of Patent: October 31, 2000Assignee: Lucent Technologies Inc.Inventors: Cheryl Anne Bollinger, Catherine Ann Fieber, Kurt George Steiner
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Patent number: 6074933Abstract: Undesirable birds beak pull back due to ion implant damage is alleviated by additional oxide growth.Type: GrantFiled: September 5, 1997Date of Patent: June 13, 2000Assignee: Lucent Technologies Inc.Inventors: Yi Ma, Pradip Kumar Roy
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Patent number: 6020256Abstract: Dielectric planarization is achieved by Defocus and under exposure of photoresist. The photoresist may be etched at the same rate as the dielectric, thereby yielding a smooth or planarized dielectric.Type: GrantFiled: December 18, 1996Date of Patent: February 1, 2000Assignee: Lucent Technologies Inc.Inventors: Alberto Colina, Benito Herrero
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Patent number: 6004827Abstract: A variety of test structures may be fabricated with aluminum runners and overlying dielectrics. The dielectrics are removed and bumps are observed upon the aluminum runners. Unevenness in the bump distribution is a predictor of long term reliability problems. A test structure may be utilized to design integrated mass production fabrication processes.Type: GrantFiled: September 3, 1997Date of Patent: December 21, 1999Assignee: Lucent Technologies Inc.Inventor: Vivian Wanda Ryan
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Patent number: 5981975Abstract: An optoelectronic apparatus has, a die having a mesa (103) with a surface emitting optical device and a metallized p-type contact (209), a planar pad (201) adjacent the mesa for Z-height registration with an optical bench, a first notch (206) having been provided by a first etch and having thereon a metallized n-type contact (208) that is coplanar with the p-type contact (209), a second notch having a side surface (204) having been provided by a second etch, the second notch to abut the optical bench along an x-axis, the first notch (206) extending to the second notch, and the die having side surfaces (207) to abut the optical bench along a y-axis, and the second notch extending to the side surfaces (207).Type: GrantFiled: February 27, 1998Date of Patent: November 9, 1999Assignee: The Whitaker CorporationInventor: Eugene A. Imhoff
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Patent number: 5966627Abstract: A method and apparatus for the manufacture of integrated circuits including the placement of a single tube for introduction of dopant gases into a process chamber is disclosed.Type: GrantFiled: August 30, 1996Date of Patent: October 12, 1999Assignee: Lucent Technologies Inc.Inventors: David C. Brady, Yaw Samuel Obeng
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Patent number: 5913002Abstract: A passive alignment scheme for aligning surface emitting/detecting optical electronic devices to optical fibers through the use of a mini-MT ferrule used in a RJ connector by way of silicon waterboard technology. The mini-MT ferrule has guide pins which are use to align the optical fiber ultimately to the optoelectronic device.Type: GrantFiled: February 27, 1998Date of Patent: June 15, 1999Assignee: The Whitaker CorporationInventor: Ching-Long Jiang
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Patent number: 5905831Abstract: An apparatus for coupling an optical fiber to an optical device comprises a substrate and a passive alignment member. The substrate having a top surface and a bottom surface. The top surface having a fist groove disposed thereon for holding an optical fiber, and a second groove disposed on the top surface. The second groove being substantially orthogonal to the first groove. The passive alignment member disposed in the second groove. The passive alignment member having selectively etched forward and side pedestals for aligning the optical device to the optical fiber disposed in the first groove.Type: GrantFiled: June 28, 1996Date of Patent: May 18, 1999Assignee: The Whitaker CorporationInventors: Robert Addison Boudreau, Terry Patrick Bowen, Hongtao Han
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Patent number: 5588013Abstract: The present invention relates to a tuneable ring laser with an output having a fixed, stable linear state of polarization with a fixed and known azimuth. The state of polarization at the output is fixed by compensating for component birefringence of the various ring elements that alter the polarization state and azimuth.Type: GrantFiled: November 30, 1994Date of Patent: December 24, 1996Assignee: The Whitaker CorporationInventors: Paul Reitz, Hatem Abdelkader
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Patent number: 5519363Abstract: A dielectric substrate of a material such as silicon is used to provide controlled impedance waveguides for coupling an optoelectronic device to an electronic device. The impedance is controlled by varying the thickness of the dielectric between the signal lines and the ground plane. In the preferred embodiment, the crystallographic structure of the silicon is employed to achieve great precision of the dielectric thickness.Type: GrantFiled: May 31, 1994Date of Patent: May 21, 1996Assignee: The Whitaker CorporationInventors: Robert A. Boudreau, Hongtao Han, Ping Zhou
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Patent number: 5500910Abstract: A passively aligned optical interconnect is described for use as a wavelength division multiplexer (WDM) and demultiplexer. The device makes use of silicon waferboard for a low cost interconnect. Computer generated holograms are used to effect the multiplexing/demultiplexing as well as focusing of the beams. In an alternative embodiment, the device is used as a beam splitter for monochromatic light. In yet another embodiment, the device is used to spatially separate the polarization states of light.Type: GrantFiled: June 30, 1994Date of Patent: March 19, 1996Assignee: The Whitaker CorporationInventors: Robert A. Boudreau, Terry P. Bowen, Hongtao Han, John R. Rowlette, Sr., Jared D. Stack
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Patent number: 5479540Abstract: A passively aligned bi-directional optoelectronic transceiver module assembly utilizes a computer generated hologram as a diffractor to split/combine light beams of two different wavelengths. The entire assembly is constructed of monocrystalline silicon which is photolithographically batch processed to provide a low cost, compact structure with precision tolerances which is inherently passively aligned upon assembly.Type: GrantFiled: February 1, 1995Date of Patent: December 26, 1995Assignee: The Whitaker CorporationInventors: Robert A. Boudreau, Hongtao Han, Ervin H. Mueller, John R. Rowlette, Sr., Jared D. Stack
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Patent number: 5469455Abstract: The present invention relates to a tuneable ring laser with an output having a fixed, stable linear state of polarization with a fixed and known azimuth. The state of polarization at the output is fixed by careful splice and component orientation that compensates for component birefringence of the various ring elements that alter the polarization state and azimuth. Further, such polarization transformation is minimized by careful deployment of the non-polarization component.Type: GrantFiled: November 30, 1994Date of Patent: November 21, 1995Assignee: The Whitaker CorporationInventors: Paul Reitz, Hatem Abdelkader
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Patent number: 5467419Abstract: A connector assembly includes an active fiber needle 1 having a passive or active optical device 6 connected to an end face 7 of a thick metallized coating 4 and a cup-shaped mount 10 for hermetically enclosing the optical device. The mount 10 hermetically encloses the optical device 6 and provides heat dissipation and electrical connections for optical device 6. The cup-shaped mount may include a ceramic tubular sleeve hermetically sealed to the metal coating 4 on the fiber needle 1 about a central bore 12A thereof. Electrical connections between the optical device 6 and devices external to the mount may preferably be provided through a spring contact 18 which is soldered to terminals on device 6 and has at least one leg 18A, 18B extending through the hermetically sealed cup-shaped housing 10. Other embodiments of electrical lead connections may be provided by wire bonds 24 between device 6 and external metallization surfaces 26A.Type: GrantFiled: June 9, 1994Date of Patent: November 14, 1995Assignee: The Whitaker CorporationInventors: Robert W. Roff, Randall B. Wilson
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Patent number: 5420953Abstract: The disclosure describes an optical interconnect which utilizes a silicon waferboard (1) with grooves (3,4) etched to expose preferred crystallographic planes to effect alignment of focusing elements (5) between optical waveguides (6) and optoelectronic devices (2). The focusing elements (5) are made of silicon wafers and are etched to expose crystal planes which compliment crystal planes of cavities or grooves which are etched in the waferboard. The focusing elements may have holograms (7) formed thereon for efficient focusing to the optical waveguide (6).Type: GrantFiled: February 17, 1994Date of Patent: May 30, 1995Assignee: The Whitaker CorporationInventors: Robert A. Boudreau, Hongtao Han, John R. Rowlette, Sr., Jared D. Stack