Abstract: A divider control circuit includes a first and a second delta sigma modulator configured to generate a divider control signal for a fractional-N divider and a fractional signal indicative of a phase error in the divider output. The fractional signal is supplied for control of an interpolator circuit. The divider control circuit may be implemented as a look-ahead circuit where two or more divider control signals and fractional signals are generated during a single cycle to allow the divider control circuit to be run at a reduced clock rate.

Abstract: A system provides push services and information to mobile stations via broadcast messages. The broadcast messages are made on predetermined cell broadcast channels, which are associated with an inbox on the mobile stations. Contained within the messages are Uniform Resource Locators (URL) that, when accessed, provide multimedia and other rich content to the mobile station. The system allows wireless carriers to provide features such as Wireless Access Protocol (WAP) push operations via cell broadcast to many mobile stations in a geographic area without the need to individually address messages to the mobile stations.

Abstract: A very dense cross-point memory array of multi-level read/write two-terminal memory cells, and methods for its programming, are described. Multiple states are achieved using two or more films that each have bi-stable resistivity states, rather than “tuning” the resistance of a single resistive element. An exemplary memory cell includes a vertical pillar diode in series with two different bi-stable resistance films. Each bi-stable resistance film has both a high resistance and low resistance state that can be switched with appropriate application of a suitable bias voltage and current. Such a cross-point array is adaptable for two-dimensional rewritable memory arrays, and also particularly well-suited for three-dimensional rewritable (3D R/W) memory arrays.

Abstract: A combined SAIC receiver and a multiple-antenna, receive diversity receiver are employed to reduce interference in a wireless system. The real and imaginary parts of the de-rotated signal for each receive path associated with an antenna are separately filtered and a combined output signal of all receive paths is generated. The weighting coefficients are adjusted based on an error signal produced by comparing the combined output signal with a reference signal. The weighting coefficients are initially set based on an MMSE/LS type of signal processing criteria, where the reference signal is the Training Sequence Code (TSC). Subsequent adjustment/tracking can be accomplished by using known tracking algorithms, e.g. LMS or RLS, or the coefficients can be re-computed using MMSE/LS processing. The reference signal for tracking may be a combination of the TSC and estimated data symbols provided by an equalizer.

Abstract: Techniques for performing DC to DC power conversion in switch-mode converter circuits include combinations of dynamic switch shedding, phase shedding, symmetric phase circuit topologies, and asymmetric phase circuit topologies. In at least one embodiment of the invention, a method of operating a power converter circuit includes operating a first phase switch circuit portion using a first number of switch devices when the power converter circuit is configured in a first mode of operation. The first number is greater than zero. The method includes operating the first phase switch circuit portion using the first number of switch devices when the power converter circuit is configured in a second mode of operation. The method includes operating a second phase switch circuit portion using a second number of switch devices when the power converter circuit is configured in the second mode of operation. The second number is greater than the first number.

Abstract: A technique for reducing costs associated with a radio access network of a mobile telecommunications network includes configuring the radio access network using a linear programming model of the radio access network subject to constraints. The technique includes selecting cellular sites and hub locations of the radio access network to be connected by broadband wireless links based on the linear programming model and constraints. In at least one embodiment of the invention, a method of designing a radio access network of links between a cellular site and a core network includes selecting at least one first link of the radio access network to be at least one first wireless link at least partially based on a linear programming model of the radio access network. The method includes configuring an output device of a computer system to indicate the selection.

Abstract: A simple block coding arrangement is created with symbols transmitted over a plurality of transmit channels, in connection with coding that comprises only simple arithmetic operations, such as negation and conjugation. The diversity created by the transmitter utilizes space diversity and either time or frequency diversity. Space diversity is effected by redundantly transmitting over a plurality of antennas, time diversity is effected by redundantly transmitting at different times, and frequency diversity is effected by redundantly transmitting at different frequencies: Illustratively, using two transmit antennas and a single receive antenna, one of the disclosed embodiments provides the same diversity gain as the maximal-ratio receiver combining (MRRC) scheme with one transmit antenna and two receive antennas.

Abstract: An integrated circuit communications interface operable consistent with multiple data transmission protocols includes error detection circuitry that implements a cyclic redundancy check (i.e., CRC) function. The error detection circuitry generates a checksum based, at least in part, on a selected one of the multiple data transmission protocols. The error detection circuitry includes at least one circuit that generates a digital code according to an operation including terms common to the multiple data transmission protocols. That digital code is combined with a selected digital code to generate the CRC. The selected digital code is generated by an individual circuit corresponding to a respective one of the multiple data transmission protocols. The individual circuit generates the selected digital code according to an operation including at least terms exclusive to the respective one of the multiple data transmission protocols.

Abstract: An adaptively tuned RF power amplifier includes at least one power amplifier stage that has one or more active elements. A tunable output network is coupled to the power amplifier stage and includes one or more adjustable reactive elements. A mismatch detector detects a tuning mismatch based, at least in part, on one or more signals present within the tunable output network, and supplies one or more mismatch signals indicative of a detected tuning mismatch. A tuning controller, responsive to the one or more mismatch signals, controls one or more of the one or more adjustable reactive elements in the tunable output network so as to control the detected mismatch.

Abstract: Calls to or from a prepaid subscriber of a wireless communication network are identified as being associated with prepaid services, and a prepaid identifier is associated with the call. The prepaid identifier and other call information such as call origin or destination is routed to a prepaid services management system in another network that determines if the call is to be authorized based on, for example, a prepaid subscriber account balance stored at the prepaid services management system. The prepaid identifier can be combined with a number associated with the call origin or destination, and the combination delivered to the prepaid services management system.

Abstract: Techniques have been developed to facilitate concurrent evaluation of hash rule entries in ways that allow an implementation to maintain a deterministic resultant hash irrespective of variations in the allocation of particular rules to particular storage banks or evaluation logic, such as may occur with rule set revisions. Similarly, uniform deterministic hash results can be assured even across a range of implementations that support greater or lesser levels of concurrent rule evaluations.

Abstract: A technique for observing signaling on the traces between ICs on a PC board without introducing significant signal degradation is provided. A route-through connector footprint allows the use of a standard connector without the use of stub traces. The route-through connector footprint allows a standard connector to be introduced directly into the line traces routed between ICs. Because stub traces are not used, this technique for mechanical interconnection into the line traces on a PC board allows for a single board layout to be used for both test and production. Additionally, because stub traces are not used, signal quality is minimally impacted and testing can be performed at operational speeds improving the reliability of the test function. The use of a route-through connector footprint additionally saves PC board space and cost.

Abstract: An integrated circuit includes a radiation-triggered shutdown circuit that disables a critical aspect of the integrated circuit rendering the integrated circuit non-functional when the integrated circuit receives a predetermined radiation dose. That ensures integrated circuits including the radiation-triggered shutdown circuit are ITAR compliant.

Abstract: An attribute rule enforcer for evaluating the attributes of a call to add, modify, or delete information in a directory, such as a lightweight directory access protocol (LDAP) directory. The attribute rule enforcer determines if the attributes of the call comply with predetermined rules governing the directory's content. The directory attribute rule enforcer may be located at the front end of the directory's access server, and intercepts calls to the directory access server. If the directory attribute rule enforcer determines that the attributes of a call complies with the rules governing the content of the directory, it will forward the call to the directory's access server for action. If, on the other hand, directory attribute rule enforcer determines that the attributes of a call do not comply with the rules governing the content of the directory, the attribute rule enforcer will reject the call. Further, it may forward an appropriate error message to the source of the call.

Abstract: A device communicates with a telecom system to establish a call or data session. The communication includes an identifier used by the telecom system to obtain account information and/or preauthorization from a fund guardian. The fund guardian maintains account information about the device and/or subscriber associated with the identifier. A fund guardian authorizes a call access cost or data session access cost. The telecom system facilitates the call or data session between the device and a destination address until the authorized access costs are expired. A reauthorization can occur prior to expiration. An access rate negotiation may also include a bandwidth negotiation.

Abstract: A system and a method for connecting a call through a telecommunications network. A base station, connected to a public switched telephone network, includes a call processor, a memory and a transceiver. The memory includes a database containing dialing instructions for a wireless station for a telephone connection through the public switched telephone network to a destination station. The transceiver receives a call request from the wireless station, and the call processor in response to the call request, assesses the database and dials a call for connection through the public switched telephone network to the destination station based on the dialing instructions for the wireless station.

Abstract: A clock synthesis circuit includes a delta sigma modulator that receives a divide ratio and generates an integer portion and a digital quantization error (a fractional portion). A fractional-N divider divides a received signal according to a divide control value corresponding to the integer portion and generates a divided signal. A phase interpolator adjusts a phase of the divided signal according to the digital quantization error to thereby reduce noise associated with the fractional-N divider.

Abstract: A noise cancellation signal is generated for a fractional-N phase-locked loop (200). A divide value is provided to a first delta sigma modulator circuit (203), which generates a divide control signal to control a divide value of a feedback divider (208) in the phase-locked loop. An error term (e) is generated that is indicative of a difference between the generated divide control signal and the divide value supplied to the first delta sigma modulator circuit. The error term is integrated in an integrator (320) to generate an integrated error term (x), where xk+1=xk+ek; and a phase error correction circuit (209) utilizes the error term ek and the integrated error term xk to generate the phase error cancellation signal.

Abstract: A processor receives a command via a sideband interface on the processor to read processor state information, e.g., CPUID information. The sideband interface provides the command information to a microcode engine in the processor that executes the command to retrieve the designated processor state information at an appropriate instruction boundary and retrieves the processor state information. That processor information is stored in local buffers in the sideband interface to avoid modifying processor state. After the microcode engine completes retrieval of the information and the sideband interface command is complete, execution returns to the normal flow in the processor. Thus, the processor state information may be obtained non-destructively during processor runtime.