Abstract: An on-line video editing system includes interface software containing in preferably text file format protocol information and a mapping of the architectural functions of peripheral devices that a user can control via the editor. This software allows the present invention to readily control all functions of which a peripheral device is capable, and to issue commands in a synchronized, distributed manner in the proper protocol for the peripheral device. The system permits simultaneous control of up to 48 serial devices (all of which may be switchers) as well as 8 GPI controlled devices, and permits multiple users or multiple simultaneous edits. Further, the interface software enables a user to input (preferably in text file form) a desired edit effect, whereupon the system will make design decisions and construct the desired effect using such devices as are available to the system.

Abstract: A method of electrically generating a line comprising:a) providing first shape signals representative of at least part of a selected implement shape and second shape signals representative of a cross-sectional portion of said implement shape;b) determining first and second positions between which a line is to be generated; andc) generating said line utilizing said first shape signals in the region of said first and second points and said second shape signals for creating a segment in a region between said first and second points.

Abstract: In a component video signal to composite video signal encoding system (10), the component input signals are stored in a first in, first out (FIFO) memory. The FIFO memory is connected by 1 luminance and 2 chrominance outputs to a rate converter, which increases the digital sampling rate of the signals as received from the FIFO memory. The rate converter is in turn connected by 1 luminance and 2 chrominance outputs to luminance and chrominance processing circuits. The luminance and chrominance processing circuits produce the composite video signals, and are connected to a D2 standard driver circuit. The output of the D2 driver circuit is D2 standard digital component signals. The luminance and chrominance processing circuits are also connected to a digital to analog (D/A) converter. The output of the D/A converter is an analog PAL or NTSC component video signal.

Abstract: An asynchronous adaptive media server mechanism permits a user to navigate around a modelled multimedia space as quickly as input events or instances are handled. The mechanism permits cancellation of outstanding queued requests that have become obsolete as the user navigates out of the area for which the request was needed. A client module generates display requests by defining a client object for every active multimedia instance, and at least one server module acts as a request queue manager and processes the requests. The server module includes a media server that preferably provides service of user-selected quality. Upon request cancellation, client resources can be released immediately; a server state module mechanism may release server resources until there is no risk of endangering system operations. The ability to cancel or de-serialize queued requests permits prioritizing the requests in a fashion that will permit media server performance to be adaptively optimized to match the users' actions.

Abstract: A digital still store system (10) receives composite digital 4:2:2 D1 video signal inputs in parallel at (12) or serially at (14). The signals are supplied in component form selectively to one of framestores (18) and (20). The component signals are supplied from the framestores (18) and (20) to hard disks (22) through a buffer store (24) and disk input/output (I/O) circuits (26). Each of the hard disks (22) stores still video images as either 525 or 625 line digital frames for either NTSC or PAL composite signal inputs and outputs. Y and C fields of component video signal information are supplied from the hard disks (22) through the buffer store (24) and one of the frame stores 18 and 20 to a compositor (28) for output as digital 4:2:2 video signals. The buffer store (24) obtains the video signal fields for either full size images or 1/4 size images, when an array for browsing and selection is desired.

Abstract: According to a presently preferred embodiment of the invention, image enhancement apparatus for digital video images comprises a two-stage filter comprising a median filter and a recursive filter. The median filter operates in one, two, and three dimensions wherein the cluster of pixels framing the center pixel are ranked, and the median value of the pixel cluster is chosen as the correct pixel value. The pixel cluster configuration is selectable, as are the planes where the pixels are located. Multiple weights may be given to the appropriate median filter inputs. A motion detector is used to prevent replacement of each pixel by its pixel cluster median value when there is excessive motion. Finally an adjustable pixel-replacement threshold is defined. Each pixel must deviate from its median value before it is replaced by that value.

Abstract: A real-time disk system (10) stores and plays back D1 digital 10-bit 4:2:2 component video and audio signals from magnetic storage disks (12). The system (10) has a main channel subsystem (14) with an associated smooth motion option (16) and a second or key channel option subsystem (18) with an associated smooth motion option (20). Serial and parallel D1 digital video inputs (30) and (32) and outputs (34) and (36) are connected to each of the channels (14) and (18) and to control subsystem (22). In the main channel (14), the serial and parallel D1 input (30) is connected through an input board (60) to a video processing board (62). The video board (62) is connected by a bidirectional, 11.times.2 wide bus (64) to disk arrays (66) and (68). Digital video signal information is stored and retrieved in parallel to and from the disk arrays (66) and (68) without requiring any serial to parallel or parallel to serial conversion.

Abstract: A digital image compositing system (20) has background, foreground, key and mask busses (22), (24), (26), and (28). An analog key input (30) is connected to the key and mask busses (26) and (28) through an analog/digital (A/D) converter (32) by crosspoint switches (34). Four digital D1 video signal inputs (36) are connected to the busses (22-24) through additional crosspoint switches (34). The key and mask busses (26) and (28) are respectively connected to frame stores (38) and (40). A key processing toolkit subsystem (42) is connected to the output of the frame stores (38) and (40). A compositor subsystem (44) is connected to the background and foreground busses (22) and (24) and to the output of the key processing toolkit subsystem (42). A D1 program output (46) is connected to the output of the compositor subsystem (44) on program bus ( 48). A D1 key output (50) is connected to the output of key processing toolkit subsystem (42) on processed key bus (52).

Abstract: A decoding system (10) receives a composite digital NTSC D2 input signal or a composite analog NTSC RS-170A input signal. The decoding system (10) decodes and sample rate converts to a component digital D1 output and a component analog RGB or Y(R-Y) (B-Y) output. A control panel (20) is connected to the decoding system (10) to provide digital control of the important decoding parameters to provide decoding flexibility. The composite video signal is supplied directly to an adaptive combiner (44), through a line comb filter (48) to the adaptive combiner (44), and through a frame comb filter (52) to the adaptive combiner (44). The composite video signal is also supplied to a frame transition or motion detector (58) and to a line transition or motion detector (60). If no frame transition or motion is detected, the adaptive combiner (44) utilizes frame based three dimensional decoding.