Patents Assigned to Acer Semiconductor Manufacturing, Inc.
  • Patent number: 5817558
    Abstract: A semiconductor processing method for forming self-aligned T-gate Lightly-Doped Drain (LDD) device of recessed channel is presented. The method comprises the steps of covering a substrate with pad oxide, forming a lightly-doped layer by ion implantation, depositing a silicon nitride layer on the surface of the pad oxide, and etching the silicon nitride layer according to a predefined mask pattern to expose the silicon oxide layer and to form a gate region. A polysilicon spacer region is formed on the side-walls of the silicon nitride layer. Anisotropic etch is used to etch the polysilicon spacer region, and at the same time etch the exposed pad oxide and a portion of the substrate to form a T-shaped groove. An amorphous silicon layer is deposited in the T-shaped groove after forming a thin oxide layer, then the amorphous silicon deposited apart from the T-shaped groove region is removed. The silicon nitride layer is removed to form a T-gate.
    Type: Grant
    Filed: December 10, 1997
    Date of Patent: October 6, 1998
    Assignee: Acer Semiconductor Manufacturing Inc.
    Inventor: Shye Lin Wu