Abstract: The invention provides a block copolymer comprising at least a first block and a second block. The first block comprises a plurality of temperature-sensitive monomeric units, a plurality of hydrophilic monomeric units and a plurality of targeting monomeric units, and the second block comprises a plurality of hydrophobic monomeric units. The second block comprises at least one pH-sensitive moiety.
Type:
Grant
Filed:
July 5, 2006
Date of Patent:
August 20, 2013
Assignee:
Agency for Science, Techology and Research
Abstract: A process for packaging semiconductor devices for flip chip and wire bond applications, wherein specific materials of the semiconductor devices are protected during device processing sequences and dicing procedures, has been developed. After definition of copper interconnect structures surrounded by a low k insulator layer, a protective, first photosensitive polymer layer comprised with a low dielectric constant is applied. After definition of openings in the first photosensitive polymer layer exposing portions of the top surface of the copper interconnect structures, a dicing lane opening is defined in materials located between copper interconnect structures. Conductive redistribution shapes are formed on the copper interconnect structures exposed in the openings in the first photosensitive polymer layer, followed by application of a protective, second photosensitive polymer layer.
Type:
Grant
Filed:
October 12, 2004
Date of Patent:
January 9, 2007
Assignee:
Agency for Science, Techology and Research