Patents Assigned to Akita Electronics Systems Co., Ltd.
  • Patent number: 7715869
    Abstract: The semiconductor integrated circuit (RF IC) for a mobile telephone capable of transmitting/receiving the signals of plural bands reduces the DC offsets of the amplifiers located in the following stages of the mixers that demodulate or down-convert the reception signals. The invention scrambles the signal lines to transmit the outputs of the plural mixers that demodulate or down-convert the reception signals of different bands, so as to avoid the adjacent signal lines from making the same combination from the starting ends to the finishing ends.
    Type: Grant
    Filed: September 4, 2003
    Date of Patent: May 11, 2010
    Assignees: Hitachi, Ltd., Akita Electronics Systems Co., Ltd.
    Inventors: Satoru Takahashi, Ikuya Ohno, Norio Hayashi, Masachika Ohno, Kazuhiro Tagawa
  • Patent number: 7136340
    Abstract: A disk type record playback device having a wobble signal extracting bandpass filter for controlling a filter's center frequency according to a frequency follow-up control loop including a dummy filter identical in configuration to a filter to be controlled, and a phase comparator is capable of controlling the center frequency of the bandpass filter with satisfactory accuracy. A frequency variable lowpass filter is provided in a preceding stage of the phase comparator constituting a frequency follow-up circuit and supplies a signal obtained by eliminating harmonic components from a frequency follow-up clock signal to the phase comparator. A cutoff frequency of the lowpass filter is changed in cooperation with a center frequency of the bandpass filter, based on a signal outputted from the frequency follow-up control loop.
    Type: Grant
    Filed: November 25, 2003
    Date of Patent: November 14, 2006
    Assignees: Renesas Technology Corp., Akita Electronics Systems Co., Ltd.
    Inventors: Hiroshi Ide, Satoshi Fujita
  • Patent number: 7091620
    Abstract: A semiconductor device includes a semiconductor chip formed with connection terminals, an elastic structure interposed between a main surface of the chip and a wiring substrate formed with wirings connected at first ends thereof to the connection terminals, and bump electrodes connected to the other ends of the wirings. The connection terminals may be at a center part or in peripheral part(s) of the chip main surface and both the elastic structure and wiring substrate are not provided at locations of connection terminals. A resin body seals at least the connection terminals and the exposed first ends of wirings (leads). In a scheme in which the connection terminals are located in a peripheral part of the chip main surface, the wiring substrate protrudes beyond the chip boundary where the connection terminals are arranged, and the resin body shape is restricted by the protruding part of the wiring substrate.
    Type: Grant
    Filed: April 28, 2005
    Date of Patent: August 15, 2006
    Assignees: Renesas Technology Corp., Hitachi ULSI Systems Co., Ltd., Akita Electronics Systems, Co., Ltd.
    Inventors: Chuichi Miyazaki, Yukiharu Akiyama, Masnori Shibamoto, Tomoaki Kudaishi, Ichiro Anjoh, Kunihiko Nishi, Asao Nishimura, Hideki Tanaka, Ryosuke Kimoto, Kunihiro Tsubosaki, Akio Hasebe, Takehiro Ohnishi, Noriou Shimada, Shuji Eguchi, Hiroshi Koyama, Akira Nagai, Masahiko Ogino
  • Patent number: 7091587
    Abstract: An electrode on a main surface of a module board, to which an emitter electrode of a semiconductor chip which includes a switching element of a power supply control circuit that supplies a power supply voltage to amplifier circuit parts of a power module of a digital cellular phone, is electrically connected to a wiring in an internal layer of the module board through a plurality of via holes. Further, the wiring is electrically connected to an electrode for the supply of the power supply voltage, which is provided on a back surface of the module board. Accordingly, an output characteristic of the semiconductor device is improved.
    Type: Grant
    Filed: April 9, 2004
    Date of Patent: August 15, 2006
    Assignees: Renesas Technology Corp., Akita Electronics Systems Co., Ltd.
    Inventors: Yusuke Sato, Kenji Koyama, Toshihiro Miura, Toshihiko Kyogoku
  • Patent number: 7064612
    Abstract: The present invention provides a high frequency power amplification circuit capable of preventing an output power and current consumption from being largely changed even when a load fluctuates in a wireless communication system for detecting an output level necessary for feedback control by a current detecting method. In a high frequency power amplification circuit as a component of a wireless communication system which detects an output level necessary for feedback control by a current detecting method, a capacitive element is interposed between the drain terminal of a power amplification transistor in the final stage and the gate terminal of a transistor constructing a current mirror circuit in a circuit for detecting an output level, and a change in an output power accompanying load fluctuation is reflected in a detection current of the output level detecting circuit.
    Type: Grant
    Filed: October 10, 2003
    Date of Patent: June 20, 2006
    Assignees: Hitachi, Ltd., Akita Electronics Systems Co., Ltd.
    Inventors: Hitoshi Akamine, Seikou Ono, Masashi Maruyama
  • Patent number: 7061105
    Abstract: Two memory chips mounted over a base substrate have the same external size and a flash memory of the same memory capacity formed thereon. These memory chips are mounted over the base substrate with one of them being overlapped with the upper portion of the other one, and they are stacked with their faces being turned in the same direction. The bonding pads BP of one of the memory chips are disposed in the vicinity of the bonding pads BP of the other memory chip. In addition, the upper memory chip is stacked over the lower memory chip in such a way that the upper memory chip is slid in a direction (X direction) parallel to the one side of the lower memory chip and in a direction (Y direction) perpendicular thereto in order to prevent partial overlapping of it with the bonding pads BP of the lower memory chip.
    Type: Grant
    Filed: December 24, 2003
    Date of Patent: June 13, 2006
    Assignees: Hitachi, Ltd., Akita Electronics Systems Co., Ltd.
    Inventors: Masachika Masuda, Toshihiko Usami
  • Patent number: 7050779
    Abstract: The thermal interference due to the self heating of transistors constituting a gilbert cell circuit is reduced, thereby largely improving the receiving sensitivity to signals. A mixer circuit composed of a gilbert cell circuit comprises transistors T1 to T6. Each of the transistors T1 to T4 is con figured so that four transistors may be connected in parallel. In a layout on a semiconductor chip, four transistors T1a to T1d and T2a to T2d respectively constituting the transistors T1 and T2 are respectively separated into two pairs, and the respective two pairs are laid out in a crisscross shape so that they are crossed with each other. Similarly, four transistors T3a to T3d and T4a to T4d respectively constituting the transistors T3 and T4 are respectively separated into two pairs, and the respective two pairs are laid out in a crisscross shape so that they are crossed with each other. Thus, the thermal influence applied on the transistors T1 to T4 is uniformed.
    Type: Grant
    Filed: March 31, 2003
    Date of Patent: May 23, 2006
    Assignees: Hitachi, Ltd., Akita Electronics Systems Co., Ltd.
    Inventors: Ikuya Ono, Kazuhiro Tagawa, Satoru Takahashi
  • Patent number: 6979593
    Abstract: A semiconductor device is manufactured by covering a main surface of a wafer with protective tape, grinding a back side of the wafer to form an extremely thin wafer and affixing it to a dicing tape, dicing to form extremely thin semiconductor chips, picking up the chips and fixing each picked-up chip to a product forming area on a wiring substrate, removing the protective tape, performing wire bonding, covering the chips and wires of the wiring substrate with an insulating resin layer, forming bump electrodes on a back side of the wiring substrate, cutting the wiring substrate affixed to a support member together with the insulating resin layer, thereby forming plural semiconductor devices, and removing each semiconductor device from the support member.
    Type: Grant
    Filed: February 26, 2003
    Date of Patent: December 27, 2005
    Assignees: Hitachi, Ltd., Akita Electronics Systems Co., Ltd.
    Inventor: Masaru Kawakami
  • Patent number: 6791173
    Abstract: In order to manufacture a thin and small semiconductor device at low cost, the semiconductor device and its manufacturing method are disclosed. The semiconductor device comprises: a film wiring substrate made of insulating resin; a semiconductor chip fixed to the main surface of the wiring substrate; conductive wires to connect terminals of the semiconductor chip and wirings on the main surface of the wiring substrate; an encapsulation made of insulating resin integrally laminated on the main surface of the wiring substrate and covering the semiconductor chip and the bonding wires; and conductors penetrating through the wiring substrate and having one ends connected to the wirings on the main surface of the wiring substrate and the other ends protruding to the rear surface of the wiring substrate to form external terminals formed of bump electrodes, wherein the external terminals form the ball grid array.
    Type: Grant
    Filed: May 20, 2003
    Date of Patent: September 14, 2004
    Assignees: Hitachi, Ltd., Akita Electronics Systems Co., Ltd.
    Inventor: Toru Saga
  • Publication number: 20040145983
    Abstract: A disk type record playback device having a wobble signal extracting bandpass filter for controlling a filter's center frequency according to a frequency follow-up control loop including a dummy filter identical in configuration to a filter to be controlled, and a phase comparator is capable of controlling the center frequency of the bandpass filter with satisfactory accuracy. A frequency variable lowpass filter is provided in a preceding stage of the phase comparator constituting a frequency follow-up circuit and supplies a signal obtained by eliminating harmonic components from a frequency follow-up clock signal to the phase comparator. A cutoff frequency of the lowpass filter is changed in cooperation with a center frequency of the bandpass filter, based on a signal outputted from the frequency follow-up control loop.
    Type: Application
    Filed: November 25, 2003
    Publication date: July 29, 2004
    Applicants: Renesas Technology Corp., Akita Electronics Systems Co., Ltd.
    Inventors: Hiroshi Ide, Satoshi Fujita
  • Publication number: 20030190795
    Abstract: A method of manufacturing a semiconductor device is disclosed which can reduce the manufacturing cost of the semiconductor device by preventing contamination and damage of an extremely thin wafer and of an extremely thin semiconductor chip fabricated from the extremely thin wafer.
    Type: Application
    Filed: February 26, 2003
    Publication date: October 9, 2003
    Applicants: Hitachi, Ltd., Akita Electronics Systems Co., Ltd.
    Inventor: Masaru Kawakami