Abstract: An arrangement (apparatus and method) using fuzzy logic controls a plurality of devices in response to inputs. The time-division-multiplexed input signals are demultiplexed and fuzzified according to predetermined fuzzy sets. Each crisp input is fuzzified by determining the distance of the crisp input from a center of the membership function of the fuzzy set and linearly complementing the result with respect to the width of the membership function, thereby eliminating the necessity for determining the shape of the membership function. The center may be a fixed value or a "floating" input. The fuzzified input signals are input to an asynchronous multipath feedforward network which determines a minimum rule term for each rule processed. The multipath feedforward network is dedicated to process the fuzzified input signals in parallel and to determine the minimum rule term using a minimum amount of circuitry.

Abstract: An arrangement (apparatus and method) using fuzzy logic controls a plurality of devices in response to inputs. The time-division-multiplexed input signals are demultiplexed and fuzzified according to predetermined fuzzy sets. The fuzzified input signals are input to an asynchronous multipath feedforward network which determines a minimum rule term for each rule processed. The multipath feedfoward network is dedicated to processes the fuzzified input signals in parallel and to determine the minimum rule term using a minimum amount of circuitry. Parallel processing of the fuzzified input signals is accomplished using a plurality of minimizing elements. Significant Bits of minimizing element output signals are successively compared in a NAND tree and a resulting output is fed back to the input of each minimizing element. Upon stabilization the resulting output is the minimum rule term.

Abstract: An apparatus and method for automatically updating a threshold in a fuzzy pattern comparator. A bit-field of an input data is simultaneously compared to simultaneously-input data patterns. An accumulated distance value is obtained for each data pattern, and the accumulated distance values are simultaneously compared with each other and a threshold to determine a minimum. The comparison is performed by a multipath feed-forward network which starts with the most significant bit and determines on a bit-by-bit basis and identifies which of the accumulated distance values and the threshold are a minimum. The threshold value is automatically updated to the minimum value during the comparison process if it is determined the threshold value is not a minimum. The automatic update threshold function is effective in pattern recognition systems which require periodic adaptation or adjustment in response to slowly changing pattern conditions.

Abstract: An arrangement (apparatus and method) using fuzzy logic controls a plurality of devices in response to inputs. The time-division-multiplexed input signals are demultiplexed and fuzzified according to predetermined fuzzy sets. Each crisp input is fuzzified by determining the distance of the crisp input from a defined center of the membership function of the fuzzy set and linearly complementing the result with respect to the width of the membership function, thereby eliminating the necessity for determining the shape of the membership function. The fuzzified input signals are input to an asynchronous multipath feedforward network which determines a minimum rule term for each rule processed. The multipath feedfoward network is dedicated to processes the fuzzified input signals in parallel and to determine the minimum rule term using a minimum amount of circuitry.

Abstract: A data correlator has a selectable word length for hamming distance measurement. The correlator includes four 32-bit correlators which output a correlation result and a carry signal. The input of the four 32-bit correlators is controlled by a data select circuit, which inputs serial data to each of the four 32-bit correlators in accordance with the selected word length. When the 32-bit length is selected, the data select circuit simultaneously supplies serial data to each of the 32-bit correlators; when the 64-bit length is selected, the data select circuit effectively provides two simultaneously-performing 64-bit correlators; when the 128-bit length is selected, data select circuit streams the serial data through the four 32-bit correlators. A summation circuit preserves the carry-in signal of each 32-bit correlation in order to generate two 64-bit correlation values and one 128-bit correlation value.