Abstract: Aspects of this disclosure relate to one or more particles that move within a container in response to a magnetic field. A measurement circuit is configured to output an indication of the magnetic field based on position of the one or more particles.

Abstract: A three-phase power meter can monitor power on both 3-wire and 4-wire power lines. The power meter measures at least two voltages between phase conductors of the power line, and at least one voltage between a phase conductor and a neutral conductor of the power line when the neutral conductor is available. Using at least some of the measured voltages, the power meter can then operate in a first mode when coupled to a 3-wire power line to determine power on the power line based on the measured voltages, or operate in a second mode when coupled to a 4-wire power line to determine power on the power line based on the measured voltages.

Abstract: A network interface module for coupling a host device to a switched network as a network node is described. The network interface module comprises a single half-duplex port for communicatively coupling to a shared bus of the switched network, at least one frame queue sized to store one multicast read frame received via the shared bus, and logic circuitry. The logic circuitry is configured to decode a read command for the interface module included in a payload of the multicast read frame that includes multiple read commands for other network nodes of the switched network, and transmit a response frame including read data on the shared bus when detecting the shared bus is available for transmitting.

Abstract: A memory device comprising a memory array including memory cells to store memory data, error correcting code (ECC) circuitry configured to generate ECC data and use the ECC data to detect errors in the memory data, and an ECC circuitry checker. The ECC circuitry checker is configured to substitute the ECC data with check ECC data, compare an output of the ECC circuitry to an expected output when the substituted check ECC data is applied to the ECC circuitry, and generate an alert when the comparing indicates an error in the ECC circuitry.

Abstract: Embodiments of the present invention provide improved fault detection and mitigation systems, methods, and techniques used in a BMS in an energy storage system (for example, grid energy storage). Embodiments of the present invention may detect battery malfunction in a battery stack and take quick corrective and preventative measures accordingly. Embodiments of the present invention may also provide select redundant components to implement safety techniques described herein.

Abstract: Provided herein are delay locked loops (DLLs) with calibration for external delay. In certain embodiments, a timing alignment system includes a DLL including a detector that generates a delay control signal based on comparing a reference clock signal to a feedback clock signal, and a controllable delay line configured to generate the feedback clock signal by delaying the reference clock signal based on the delay control signal. The timing alignment system further includes a delay compensation circuit that provides an adjustment to the controllable delay line to compensate for a delay of the feedback clock signal in reaching the detector.

Abstract: Microelectromechanical systems (MEMS) switches are disclosed. Parallel configurations of back-to-back MEMS switches are disclosed in some embodiments. An isolation connection of constant electrical potential may be made to a midpoint of the back-to-back switches. In some embodiments, a separate MEMS switch is provided as a shunt switch for the main MEMS switch. MEMS switch device configurations having multiple switchable signal paths each coupling a common input electrode to a respective output electrode are also disclosed. The MEMS switch device includes shunt switches each coupling a respective output electrode to a reference potential. The presence of a shunt switch coupled to an output electrode enhances the isolation of the signal path corresponding to that output electrode when the path is open.

Abstract: Impedance paths for integrated circuits having microelectromechanical systems (MEMS) switches that allow for electrical charge to bleed from circuit nodes to fixed electric potentials (e.g., ground) are described. Such paths are referred to herein as charge bleed circuits. The circuit nodes may be circuit locations where electrical charge may accumulate because there is no other path for the electrical charge to dissipate. In some embodiments, a charge bleed circuit includes a switchable device (e.g., a MEMS switch, a solid-state device switch, or a circuit including various solid-state device switches that, collectively, implement a device that can be switched on and off) that connects and disconnects the impedance path from a circuit node. This may allow the device to perform different types of measurements at desired performance levels.

Abstract: A rate of change of current sensor includes two measurement coils, arranged on a substrate or printed circuit board. The coils form loops and progress substantially around a target measurement conductor. This ensures that the two measurement coils both receive the same electrostatic coupling from external conductors which are not the target of the measurement operation. Further, the two measurement coils are arranged such that the first coil and the second coil are, on average, the same distance to the current-carrying conductor of interest.

Abstract: System in package (SiP) modules are compact packages that include components such as processors, memory, sensors, and passive components on a single substrate. One low cost and compact way to integrate an antenna into a SiP module is to suspend an antenna in molding compound so that the antenna is embedded in the real estate of the molding compound layer. To embed the antenna, the molding compound is first deposited. A cavity can be cut in the molding compound to hold the antenna. The cavity can be filled with conductive material to form the antenna. Further molding compound can be deposited to cover the antenna and enclose the antenna in the molding compound layer. Ground structures can also be suspended in the molding compound. Such an embedded antenna can be particularly useful for radio applications.

Abstract: Systems and methods related to communication interface are provided. An interface circuitry arrangement for communication between integrated circuit (IC) devices, the interface circuitry arrangement including serial peripheral interface (SPI) circuitry having an SPI clock port, an SPI data port, and an SPI chip select (CS) port; inter-integrated circuit (I2C) circuitry having an I2C clock port and an I2C data port, wherein the I2C clock port and the SPI clock port are electrically coupled to a first connection port, and wherein the I2C data port and the SPI data port are electrically coupled to a second connection port; pattern detection circuitry to detect a signal pattern at a third connection port, the third connection port electrically coupled to the SPI CS port; and selection circuitry to selectively couple the SPI circuitry or the I2C circuitry to a data path responsive to an output of the pattern detection circuitry.

Abstract: Continuous-time (CT) analog-to-digital converters (ADCs) implementing digital correction of digital-to-analog converter (DAC) errors are disclosed. In a CT pipeline stage of a CT ADC, a CT analog input signal is sent to two different paths. A first path (a “feedforward” path) includes a cascade of a sub-ADC and a sub-DAC. A second path (a “forward” path) includes an analog delay circuit to align the delays of the input signal in the feedforward and forward paths. A combiner subtracts the output of the analog delay of the forward path from the output of the sub-DAC in the feedforward path to generate a residue signal. Devices and methods disclosed herein are based on recognition that, if the errors introduced by the sub-DAC are known, they can be corrected in the digital domain during reconstruction, achieving superior NSD and distortion performance compared to conventional approaches.

Abstract: A controller for a wireless digital addressable lighting interface (DALI) compatible system comprises physical layer circuitry configured to communicate information wirelessly with one or more secondary devices of the DALI system, and processing circuitry operatively coupled to the physical layer circuitry. The processing circuitry is configured to encode a forward packet to be sent to a secondary device of the one or more secondary devices. The forward packet includes an extended address that includes an address of the secondary device and an address of a DALI luminary device of the DALI system connected to the secondary device.

Abstract: Systems and methods are provided for architectures for an analog feedback class D modulator that increase the power efficiency of the class D modulator. In particular, systems and methods are provided for an analog feedback class D modulator having a digital feed-forward loop. The digital feed-forward loop allows for removal of signal content from an input to an analog-to-digital converter, such that the ADC processes just noise and/or error. Using the techniques discussed herein, the loop filter is low power as it processes error content but not signal content.

Abstract: Systems, devices, and methods related to electrostatic discharge (ESD) protection in radio frequency (RF) switch circuitry are provided. An electrostatic discharge (ESD)-protected radio frequency (RF) switch circuitry includes a common port; at least one terminal port; a switch circuitry coupled between the common port and the at least one terminal port, wherein the switch circuitry comprises one or more transistors connected in a stacked configuration; and a first ESD protection circuitry coupled between a gate of a first transistor of the one or more transistors and a driver circuitry for the first transistor.

Abstract: Systems and methods related to successive approximation register (SAR) analog-to-digital converters (ADCs) are provided. A method for performing successive approximation registers (SAR) analog-to-digital conversion includes comparing, using a comparator, a first digital-to-analog (DAC) output voltage to a sampled analog input voltage to generate a comparison result including a first positive output and a first negative output; and gating, using gating logic circuitry, at least one of the first positive output or the first negative output of the comparator to next logic circuitry, the gating based at least in part on a digital feedback comprising information associated with at least one of an opposite polarity of the first positive output or an opposite polarity of the first negative output.

Abstract: A dynamically configurable clock divider may include a multifrequency clock divider circuit for generating a programmable frequency output clock signal from a given frequency input clock signal may include a first counter, and a second counter. The second counter may alternate between an active state and an inactive state with opposite states of the first counter to control delivery of the programmable frequency clock signal. When the first counter is programmed to be transitioned from the inactive state to the active state, the second counter may continue to maintain the active state and a previous frequency value of the output clock signal for a predetermined number of clock signals before transitioning to the inactive state and handing control of the output clock signal to the first counter which assumes the active state.

Abstract: Automatic ambient light cancellation for an optical front end. The present disclosure includes a coarse loop and fine loop in a feedback circuit configured to cancel out currents generated by detection of ambient light. An optical front end comprises a single-ended photo-diode connected to a transimpedance amplifier (TIA) followed by a buffer stage to generate differential output. A feedback loop controls a current digital to analog converter (iDAC) which is used to cancel out undesired current (e.g., from ambient light). This results in the TIA from saturating and maintain good signal quality with greater sensitivity.

Abstract: Different approaches that aim to extend scan range of phased array antennas by means of altering surface waves and/or altering the coupling are disclosed. One approach includes providing a phased array antenna where a surface of a substrate that houses antenna elements of the array includes openings such as trenches or grooves. Such openings in the surface effectively reduce the dielectric constant of the substrate, are easy to manufacture, and may reduce or eliminate the need to use exotic and expensive low-k dielectric materials. Another approach includes providing a phased array antenna where antenna elements are disposed over a substrate in the form of surface mount (SMT) components that are reduced in size/footprint. Using SMT antenna elements with a reduced size allows achieving the same gain while spacing antenna elements farther apart with gaps in between the antenna elements, thus also reducing the overall dielectric constant of the substrate.

Abstract: Micro-scale passive devices, such as transformers and capacitors, having an insulator layer with insulative particles and/or conductive or nonlinear conductive particles disposed therein. The insulative particles disposed in the insulator layer can increase a breakdown electric field of the device, and the conductive or nonlinear conductive particles disposed in the insulator layer can reduce a maximum electric field of the device. Increasing the breakdown electric field of the device and/or reducing the maximum electric field of the device can increase the lifespan of a micro-scale passive device, and/or may allow the device to operate at a higher threshold electric field without breakdown of the device.