Abstract: Described herein are a method and apparatus for a selective SYSREF (SYStem REFerence signal) scheme that is driven by an external SYSREF source for a system that may include, for example, analog blocks, such as analog-to-digital converters (ADCs), digital-to-analog converters (DACs), radio frequency (RF) arrays, as well as digital blocks, which may include JESD serializer/deserializer (SERDES) Transport and Link Layer circuitry, all of which can be operating at different clock frequencies. In one aspect, synchronization of the components is achieved when an internal SYSREF for the analog blocks is keyed off the external SYSREF, but the internal SYSREF pulse used by the digital blocks is programmatically keyed off one of the periodic internal SYSREF pulses. Additionally, a mechanism is provided for synchronization of the programmatically selected internal SYSREF across different clock domains in the digital blocks.

Abstract: A transformer based voltage controlled oscillator (VCO) is provided with a primary resonant circuit having a first inductor connected in parallel with a variable first capacitance circuit. A secondary resonant circuit is formed from a second inductor connected in parallel with a variable second capacitance circuit, and also includes a mode control circuit. The mode control circuit controls the direction of current flow through the secondary resonant circuit inductor. The first and second inductors are inductively mutually coupled in either an even mode or an odd mode in response to the mode control circuit. The VCO supplies a first resonant frequency in response to even mode operation, or a second resonant frequency, greater than the first resonant frequency, responsive to odd mode operation. The VCO may include a first electrically tunable varactor shunted across the first capacitance circuit and a second electrically tunable varactor shunted across the second capacitance circuit.

Abstract: Scene and/or state information may be used to facilitate processing an input to separate one or more signals within the input, to shape the signal within the input, and/or for other processing of the input or signal(s) within the input. A scene determination may be made based upon location data, time data, data describing the received input, or other basis. A state determination may be made based upon the scene determination, properties of a signal itself, or other information such as location, time, etc. By determining an appropriate scene and/or state, processing of an input and/or a signal within an input may proceed in a fashion determined to provide the most valuable information for output. Systems and methods in accordance with the invention may be implemented in a wide variety of baseband processing systems, such as hearing aids and energy consumption monitoring systems.

Abstract: A system, device, and method for recording audio with the character and sonic benefits of a genuine analog recording is disclosed. More specifically, an electro-mechanical-software controlled closed loop analog signal processor (“CLASP”) system which is comprised of a CLASP unit containing firmware, a latency detection module, and CLASP hardware display and controls. The CLASP system further comprises CLASP software operably running on a digital audio workstation (“DAW”) which is also in operable communication with the CLASP unit. The CLASP unit is also in operable communication with an analog recordable medium. An analog audio signal is recorded on the analog recordable medium, which may consist of a coated tape, cup, cylinder, drum, or disk, and then immediately played back and routed to the DAW via an analog to digital converter, thus providing for digitally recorded analog audio. The CLASP system may also include converters and a mixing console.

Abstract: The operation of electrical appliances receiving electrical power from an electrical system may be indirectly monitored using monitoring units engaged with outlets on branch circuits of the electrical system. Electrical systems providing power to appliances to be monitored in accordance with the present invention may comprise split phase alternating current systems, tri-phase systems, or any other type of electrical system. Known loads may be applied to calibrate the monitoring system. The monitoring system may measure the power consumption of appliances operating on the electrical system and/or detect possible fault conditions. The monitoring system may be distributed across multiple monitoring units and other computing devices. Output devices may be used to output a summary of the power consumption or other operation of monitored electrical appliances.

Abstract: The operation of electrical appliances receiving electrical power from an electrical system may be indirectly monitored using monitoring units engaged with outlets on branch circuits of the electrical system. Electrical systems providing power to appliances to be monitored in accordance with the present invention may comprise split phase alternating current systems, tri-phase systems, or any other type of electrical system. Known loads may be applied to calibrate the monitoring system. The monitoring system may measure the power consumption of appliances operating on the electrical system and/or detect possible fault conditions. The application of a known load to each phase of the electrical system for calibration permits different portions of the electrical system to be isolated and, therefor, provides improved accuracy in monitoring power consumption and detection of potential fault conditions.

Abstract: The operation of electrical appliances receiving electrical power from an electrical system may be indirectly monitored using monitoring units engaged with outlets on branch circuits of the electrical system. Electrical systems providing power to appliances to be monitored in accordance with the present invention may comprise split phase alternating current systems, tri-phase systems, or any other type of electrical system. Known loads may be applied to calibrate the monitoring system. The monitoring system may measure the power consumption of appliances operating on the electrical system and/or detect possible fault conditions. Fault conditions may be detected by comparing obtained voltage or power signatures of appliances to expected voltage or power signatures. Expected voltage or power signatures may be obtained, for example, using historical data, a database providing typical voltage or power signatures, or through other means.

Abstract: A circuit for direct current (DC) offset estimation comprises a quantile value circuit and a signal processor. The quantile value circuit determines a plurality of quantile values of an input signal and includes a plurality of quantile filters. Each quantile filter includes a comparator, a level shifter, a monotonic transfer function component, and a latched integrator. The comparator compares the input signal and a quantile value. The level shifter shifts the output of the comparator. The monotonic transfer function component determines the magnitude of the shifted signal and provide a transfer function signal. The latched integrator suppresses transient characteristics of the transfer function signal and provide the quantile value. The signal processor is configured to calculate a weighted average of the quantile values to yield a DC offset estimate.

Abstract: Processing a signal by receiving an analog input signal located outside of a first Nyquist zone that is between 0 and fs/2; passing the analog input signal through an M-channel time-interleaved analog-to-digital converter (TI-ADC) to generate a TI-ADC output signal; and estimating and correcting a timing skew error in the TI-ADC output signal. Alternatively, an electronic circuit that includes an input for an analog input signal, an M-channel time-interleaved analog-to-digital converter (TI-ADC) and a timing skew error estimating and correcting circuitry. The analog input signal is located outside of a first Nyquist zone that is between 0 and fs/2. The TI-ADC receives the analog input signal and generates a TI-ADC output signal. The timing skew error estimating and correcting circuitry estimates and corrects a timing skew error in the TI-ADC output signal.

Abstract: A system, device, and method for recording audio with the character and sonic benefits of a genuine analog recording is disclosed. More specifically, an electro-mechanical-software controlled closed loop analog signal processor (“CLASP”) system which is comprised of a CLASP unit containing firmware, a latency detection module, and CLASP hardware display and controls. The CLASP system further comprises CLASP software operably running on a digital audio workstation (“DAW”) which is also in operable communication with the CLASP unit. The CLASP unit is also in operable communication with an analog recordable medium. An analog audio signal is recorded on the analog recordable medium, which may consist of a coated tape, cup, cylinder, drum, or disk, and then immediately played back and routed to the DAW via an analog to digital converter, thus providing for digitally recorded analog audio. The CLASP system may also include converters and a mixing console.

Abstract: Processing a signal by receiving an analog input signal located outside of a first Nyquist zone that is between 0 and fs/2; passing the analog input signal through an M-channel time-interleaved analog-to-digital converter (TI-ADC) to generate a TI-ADC output signal; and estimating and correcting a timing skew error in the TI-ADC output signal. Alternatively, an electronic circuit that includes an input for an analog input signal, an M-channel time-interleaved analog-to-digital converter (TI-ADC) and a timing skew error estimating and correcting circuitry. The analog input signal is located outside of a first Nyquist zone that is between 0 and fs/2. The TI-ADC receives the analog input signal and generates a TI-ADC output signal. The timing skew error estimating and correcting circuitry estimates and corrects a timing skew error in the TI-ADC output signal.

Abstract: The invention relates to an apparatus for electronic display comprising means for generating liquid-crystal-display (LCD) input signals, a LCD panel operable to display a color image according to the LCD input signals, a circuit operable to generate a plurality of sets of gamma correction values for gamma correction of the LCD input signals, and means for eliminating dependency of the plurality of sets of gamma correction values on a supply voltage (AVDD) of the circuit.

Abstract: The present invention relates to a method and a system of reducing flicker in a liquid crystal display (LCD). The LCD produces a display based on a video signal. A gamma curve of the LCD includes multiple gamma reference voltages corresponding to multiple gray scale values of the video signal. The method (and a system implementing the method) includes determining the gamma curve of the LCD for producing a predetermined luminance performance, driving the LCD by a test pattern having one of the multiple gray scale values, measuring a flicker of the LCD driven by the test pattern, and adjusting a gamma reference voltage in the gamma curve based on the flicker measurement to minimize the flicker of the LCD where the gamma reference voltage corresponds to the gray scale value in the gamma curve.

Abstract: A system, device, and method for recording audio with the character and sonic benefits of a genuine analog recording is disclosed. More specifically, an electro-mechanical-software controlled closed loop analog signal processor (“CLASP”) system which is comprised of a CLASP unit containing firmware, a latency detection module, and CLASP hardware display and controls. The CLASP system further comprises CLASP software operably running on a digital audio workstation (“DAW”) which is also in operable communication with the CLASP unit. The CLASP unit is also in operable communication with an analog recordable medium. An analog audio signal is recorded on the analog recordable medium, which may consist of a coated tape, cup, cylinder, drum, or disk, and then immediately played back and routed to the DAW via an analog to digital converter, thus providing for digitally recorded analog audio. The CLASP system may also include converters and a mixing console.

Abstract: A system, apparatus, device, and method for recording sounds and music with the character and sonic benefits of a genuine analog tape recording is disclosed. More specifically, an electro-mechanical-software controlled closed loop analog signal processor (“CLASP”) system, which is comprised of a digital audio workstation (“DAW”) resident on a host computer and is in operable communication with a CLASP unit or device is disclosed. The CLASP unit, which contains firmware, is also in operable communication with a tape recorder transport which is comprised of a tape mechanism transport and a control unit. In one embodiment, an analog audio signal is recorded on an analog tape and then immediately played back and routed to the DAW via an analog to digital converter, thus providing for digitally recorded analog audio. Typically, after the analog recorded signal is played back, it is erased from the tape which generally continues to cycle.

Abstract: A programmable buffer integrated circuit which can be programmed to output a set of gamma correction reference voltages to be used in LCD displays. Once programmed, the buffers will continuously output the programmed value. The device incorporates a programming interface to allow the programming of the buffer outputs to the desired values during manufacturing and test of the panel. Multiple sets of values can be programmed to provide different gamma correction curves for different user or application requirements.

Abstract: A serial bus which comprises two wires (a clock signal and a data signal), one of which transmits high voltages in addition to the two-level voltages used for conventional serial digital data transmission. During the second part of the transmission one of the serial wires changes function to a high voltage signal that is used to program the location which was addressed in the first part of the transmission. The high voltage signal may be a simple DC level for programming digital data into memory, or it can be a set of pulses with either fixed or variable parameters for programming digital, multi-level or analog levels into memory.

Abstract: A programmable buffer integrated circuit which can be programmed to output a set of gamma correction reference voltages to be used in LCD displays. Once programmed, the buffers will continuously output the programmed value. The device incorporates a programming interface to allow the programming of the buffer outputs to the desired values during manufacturing and test of the panel. Multiple sets of values can be programmed to provide different gamma correction curves for different user or application requirements.

Abstract: A single integrated circuit provides communication, sensing and recording of one or more conditions critical to the entity to which it is attached. The chip is part of a larger module comprising a visual indicator, such as an LED, and a power source such as a battery. The sensor may be a temperature sensor whose output is stored in a non-volatile memory section of the chip on some periodic basis. A product identifier is stored on the chip; a method for product recall or location is described.

Abstract: The invention discloses an analog content addressable memory (CAM) that employs analog storage cells with programmable analog transfer function capability. The analog CAM scans and/or compares its memory array contents to determine if an analog voltage applied at Vin matches a value stored in the memory array. If the value applied to Vin matches a value stored in the analog CAM, the analog data stored at a different and corresponding location in an analog storage cell is coupled to the Vout output. An analog content addressable memory, comprising a first array A of analog memory cells for storing and generating a VA voltage; and a comparator having a first input for receiving a Vin voltage, a second input for receiving the VA voltage from the first array A of analog memory cells. Analog-to-Digital and Digital-to-Analog Converters comprising an array of analog memory cells.