Patents Assigned to Andigilog, Inc.
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Publication number: 20090243113Abstract: A fusible link between metallization layers of a semiconductor device comprises a tungsten plug deposited in a via interconnecting two aluminum metallization layers.Type: ApplicationFiled: March 31, 2008Publication date: October 1, 2009Applicant: ANDIGILOG, INC.Inventors: Derrick Tuten, David L. Cave
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Publication number: 20080273865Abstract: A method and apparatus is provided for processing signals from a Hall effect device arrangement coupled to a monolithic brushless DC motor where the motor is driven by a PWM circuit providing PWM drive signals.Type: ApplicationFiled: May 1, 2007Publication date: November 6, 2008Applicant: ANDIGILOG, INC.Inventors: Jade H. Alberkrack, Robert Alan Brannen, Thomas Peter Bushey
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Publication number: 20080265811Abstract: A method of operating a direct current motor fan assembly is provided in which a motor controller operates to apply full power to kick-start a motor to overcome static forces. As soon as a sensor determines that the motor has begun to rotate, the motor controller changes the motor drive level from full power to a predetermined lower level to maintain a desired rotational speed.Type: ApplicationFiled: April 27, 2007Publication date: October 30, 2008Applicant: ANDIGILOG, INC.Inventors: Robert Alan Brannen, Jade H. Alberkrack, Thomas Peter Bushey
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Publication number: 20080240688Abstract: A control circuit for a direct current motor is described. In accordance with the principles of the invention, a duty cycle comparator is provided to control the speed of the motor.Type: ApplicationFiled: March 29, 2007Publication date: October 2, 2008Applicant: ANDIGILOG, INC.Inventors: Jade H. Alberkrack, Robert Alan Brannen
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Publication number: 20080238487Abstract: A duty cycle comparator is described for comparing the duty cycles of two digital signals. The duty cycle comparator comprises a first controllable current source, a second controllable current source and a charge accumulation device. The comparator provides an output signal that is representative of the difference between the duty cycles independent of the frequency of the two digital signals.Type: ApplicationFiled: March 29, 2007Publication date: October 2, 2008Applicant: ANDIGILOG, INC.Inventors: Jade H. Alberkrack, Robert Alan Brannen
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Publication number: 20080180154Abstract: A digital time delay circuit is provided in which fabrication process variations and temperature effects on the switching threshold level of digital circuits utilized in the timing delay circuits are substantially eliminated.Type: ApplicationFiled: January 30, 2007Publication date: July 31, 2008Applicant: ANDIGILOG, INCInventor: Robert Alan Brannen
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Publication number: 20080023768Abstract: In accordance with the principles of the invention, an integrated circuit comprises a substrate having a first FET formed on the substrate. The first FET has a first terminal coupleable to a load, a second terminal and a control terminal. The second terminal is connected to the substrate. The substrate comprises a parasitic body diode coupled between the first terminal and the substrate. The body diode is disposed such that it becomes conductive when a reverse voltage across the FET first terminal and the substrate is at least a first diode forward voltage. A voltage detector is formed on the substrate. The voltage detector has a first input coupled to the FET first terminal, a second input coupled to the substrate, and an output coupled to the FET control terminal. The voltage detector is responsive to a reverse voltage level at the FET first terminal that is less than the first diode forward voltage to turn the FET on for the duration of a reverse voltage having at least said reverse voltage level.Type: ApplicationFiled: July 25, 2006Publication date: January 31, 2008Applicant: ANDIGILOG, INC.Inventors: Jade H. Alberkrack, David L. Cave, Thomas Peter Bushey, Robert Alan Brannen
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Publication number: 20080012039Abstract: In accordance with the principles of the invention, a semiconductor substrate is provided that has a first cell formed thereon. The first cell has first and second terminals or nodes and a control terminal or node and has a characteristic breakdown voltage across the first and second terminals. A voltage sensing transistor is coupled across the power transistor first and second terminals. The voltage sensing transistor has a second element characteristic breakdown voltage that is less than the first cell characteristic breakdown voltage. The voltage sensing transistor provides a control signal to the terminal when the voltage across the first and second terminals exceeds the second element characteristic breakdown voltage.Type: ApplicationFiled: July 11, 2006Publication date: January 17, 2008Applicant: ANDIGILOG, INC.Inventors: David Cave, Jade H. Alberkrack
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Publication number: 20080013229Abstract: In accordance with the principles of the invention, a semiconductor device is provided that has a power transistor and a voltage sensing transistor formed on a substrate. The power transistor has first and second terminals and a control terminal and having a characteristic first breakdown voltage across the first and second terminals. The voltage sensing transistor is coupled across the power transistor first and second terminals. The voltage sensing transistor has a second element characteristic breakdown voltage that is less than the power transistor breakdown voltage. The second transistor provides a control signal to the power transistor control terminal when the voltage across the power transistor first and second terminals exceeds the second element characteristic breakdown voltage.Type: ApplicationFiled: July 11, 2006Publication date: January 17, 2008Applicant: ANDIGILOG, INC.Inventors: Jade H. Alberkrack, David Cave
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Publication number: 20070279029Abstract: A temperature corrected voltage bandgap circuit is provided. The circuit includes first and second diode connected transistors. A first switched current source is coupled to the one transistor to inject or remove a first current into or from the emitter of that transistor. The first current is selected to correct for curvature in the output voltage of the bandgap circuit at one of hotter or colder temperatures.Type: ApplicationFiled: June 2, 2006Publication date: December 6, 2007Applicant: ANDIGILOG, INC.Inventor: David Cave
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Publication number: 20070279030Abstract: A voltage bandgap circuit comprises a first transistor and a second transistor connected in a voltage bandgap circuit arrangement, the area of the first transistor is selected to be a predetermined multiple of the area of the second transistor; a differential input amplifier has a first input coupled to the first transistor and a second input coupled to the second transistor; the amplifier has its output coupled to an output node. A first trimmable resistance network is coupled to say the bandgap circuit and is trimmed to adjust the output voltage of the bandgap circuit based upon a single temperature voltage measurement made across two of the terminals of each transistor.Type: ApplicationFiled: June 2, 2006Publication date: December 6, 2007Applicant: ANDIGILOG, INC.Inventor: David Cave
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Patent number: 7276867Abstract: A PWM controller for a direct current brushless motor comprising first and second windings includes a motor drive circuit receiving pulse width modulation control signals to drive the first and the second windings; and a control circuit having inputs coupled to the first and second windings to control a pulse width modulation control circuit such that pulse width modulated control signals are provided to the motor drive circuit only when the voltage across the first and second windings are at a predetermined level.Type: GrantFiled: March 15, 2005Date of Patent: October 2, 2007Assignee: Andigilog, Inc.Inventors: Jade H. Alberkrack, Robert Alan Brannen
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Publication number: 20070217479Abstract: A method for providing accurate temperature sensing of a substrate utilizing the PN junction of a transistor formed on the substrate is described.Type: ApplicationFiled: April 27, 2007Publication date: September 20, 2007Applicant: ANDIGILOG, INC.Inventor: David Cave
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Patent number: 7262570Abstract: A method and apparatus of interfacing a Hall sensor to a commutation circuit comprises receiving output signals from the Hall sensor; detecting when the Hall sensor output signals are within a predetermined range; generating commutation output signals when the Hall sensor output signals are in a predetermined state for a predetermined period of time; and locking out a change in the commutation output signals for a second predetermined period of time.Type: GrantFiled: March 15, 2005Date of Patent: August 28, 2007Assignee: Andigilog, Inc.Inventors: Jade H. Alberkrack, Robert Alan Brannen
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Patent number: 7237951Abstract: A method for providing accurate temperature sensing of a substrate utilizing the PN junction of a transistor formed on the substrate is described.Type: GrantFiled: March 31, 2005Date of Patent: July 3, 2007Assignee: Andigilog, Inc.Inventor: David L Cave
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Patent number: 7148642Abstract: A control circuit is described in which a single input terminal receives digital control signals and analog control signals. In accordance with the principles of the invention, the control circuit includes an automatic power down circuit to place the control circuit into a low power draw or “sleep” mode whenever predetermined conditions are present. The automatic power down circuit monitors the single input terminal and when no demand for motor operation occurs for a predetermined period of time, the automatic power down circuit operates to place the control circuit into the low power draw mode.Type: GrantFiled: April 27, 2006Date of Patent: December 12, 2006Assignee: Andigilog, Inc.Inventors: Robert Alan Brannen, Jade H. Alberkrack
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Publication number: 20060238154Abstract: A control circuit is described in which a single input terminal receives digital control signals and analog control signals. In accordance with the principles of the invention, the control circuit includes an automatic power down circuit to place the control circuit into a low power draw or “sleep” mode whenever predetermined conditions are present. The automatic power down circuit monitors the single input terminal and when no demand for motor operation occurs for a predetermined period of time, the automatic power down circuit operates to place the control circuit into the low power draw mode.Type: ApplicationFiled: April 27, 2006Publication date: October 26, 2006Applicant: ANDIGILOG, INC.Inventors: Robert Brannen, Jade Alberkrack
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Publication number: 20060222049Abstract: A method for providing accurate temperature sensing of a substrate utilizing the PN junction of a transistor formed on the substrate is described.Type: ApplicationFiled: March 31, 2005Publication date: October 5, 2006Applicant: ANDIGILOG, INC.Inventor: David Cave
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Publication number: 20060208821Abstract: A control circuit is described in which a single input terminal receives digital control signals and analog control signals. A circuit coupled to the single input provides a first output to indicate that a signal at said single input terminal is a digital signal and a second output indicates that a signal at said single input terminal is an analog signal.Type: ApplicationFiled: January 31, 2006Publication date: September 21, 2006Applicant: ANDIGILOG, INC.Inventor: Jade Alberkrack
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Publication number: 20060208675Abstract: A method and apparatus of interfacing a Hall sensor to a commutation circuit comprises receiving output signals from the Hall sensor; detecting when the Hall sensor output signals are within a predetermined range; generating commutation output signals when the Hall sensor output signals are in a predetermined state for a predetermined period of time; and locking out a change in the commutation output signals for a second predetermined period of time.Type: ApplicationFiled: March 15, 2005Publication date: September 21, 2006Applicant: ANDIGILOG, INC.Inventors: Jade Alberkrack, Robert Brannen