Patents Assigned to Aralight, Inc.
  • Patent number: 6702480
    Abstract: An opto-electronic chip package having a rigid L-shaped chassis to which a flexible circuit board is attached. A first region of the flexible circuit board receives an opto-electronic chip. An optical fiber sub-assembly places at least one optical fiber in optical communication with at least one surface normal opto-electronic device on the opto-electronic chip. The opto-electronic chip package further includes a housing that receives the chassis, the circuit board and the optical fiber sub-assembly. Before placing the chassis, circuit board and optical fiber sub-assembly in the housing, a second region of the circuit board is attached to the chassis. As the chassis and circuit board are placed in the housing, the first region of the circuit board engages a lip of the housing. The lip forces the first region of the circuit board against the chassis such that the first region is perpendicular to the second region of the circuit board.
    Type: Grant
    Filed: June 2, 2001
    Date of Patent: March 9, 2004
    Assignee: Aralight, Inc.
    Inventor: John Sparacino
  • Patent number: 6643052
    Abstract: A micro-mechanical optical modulator having a movable membrane that is spaced from a multi-layer mirror that is disposed on a substrate. The multi-layer mirror includes an anti-reflection layer that is disposed on the substrate, and a coating layer that is disposed on the anti-reflection layer. The combined thickness of the membrane and the coating layer is equal to an integer multiple of one-half of the operating wavelength of the modulator. This thickness restriction is different than prior art Fabry-Perot cavity modulators, which typically independently restrict membrane thickness and coating layer thickness, each to multiples of one quarter of the operating wavelength. By relaxing the requirements imposed by the prior art on layer thickness, modulator performance parameters can be optimized. Specifically, optical bandwidth can be traded for insertion loss and vice versa, as suits the specifics of a particular application.
    Type: Grant
    Filed: February 20, 2001
    Date of Patent: November 4, 2003
    Assignee: Aralight, Inc.
    Inventor: Keith W. Goossen
  • Patent number: 6458411
    Abstract: Mechanically compliant bumps for flip-chip bonding have a base that is deposited, for example, on the contact pad of a semiconductor chip. A thin wall depends from the periphery of the upper surface of base. The wall advantageously completely encircles the upper surface of the mechanically compliant bump. The wall, which is capable of flexing or deforming under pressure provides mechanical compliance. The wall is able to flex or deform under pressure even if the bump is formed from high-temperature metal. These mechanically compliant bumps facilitate sound electrical connections even when an electronics device is brought into contact for bonding out of parallel.
    Type: Grant
    Filed: October 5, 2001
    Date of Patent: October 1, 2002
    Assignee: Aralight, Inc.
    Inventors: Keith W. Goossen, William Y. Jan
  • Patent number: 6424450
    Abstract: A modulator that provides low insertion loss and wide bandwidth. The modulator has a single layer, quarter wave membrane that is suspended over a substrate. The membrane has a refractive index, nm, in a range of about 1.1ns0.5≦nm≦1.4ns0.5. When actuated, the membrane moves toward the substrate, altering the reflectivity of the modulator. In some embodiments, the substrate is germanium, which has a protective layer disposed thereon to protect it from etchant during MEMS fabrication procedures.
    Type: Grant
    Filed: November 29, 2000
    Date of Patent: July 23, 2002
    Assignee: Aralight, Inc.
    Inventor: Keith W. Goossen
  • Patent number: 6420778
    Abstract: A multilayer circuit structure characterized by reduced crosstalk includes first and second superposed planar dielectric layers. On the first layer, first and second conductor lines are formed, and on the second layer, third and fourth conductor lines are formed. The first and third conductor lines, and the second and fourth conductor lines, respectively, form at least a portion of corresponding first and second differential transmission line. The first conductor line extends in parallel with the third conductor line but is both vertically spaced and horizontally offset therefrom such that a first plane orthogonal to and extending through the first and second planar layers extends through one, but not both of the first and third conductor lines (i.e., a non-overlapping region). Similarly, a second plane orthogonal to and extending through the first and second planar layers extends through a non-overlapping region of the second and fourth conductor lines.
    Type: Grant
    Filed: June 1, 2001
    Date of Patent: July 16, 2002
    Assignee: Aralight, Inc.
    Inventor: Victor Sinyansky
  • Patent number: 6388322
    Abstract: Mechanically compliant bumps for flip-chip bonding have a base that is deposited, for example, on the contact pad of a semiconductor chip. A thin wall depends from the periphery of the upper surface of base. The wall advantageously completely encircles the upper surface of the mechanically compliant bump. The wall, which is capable of flexing or deforming under pressure provides mechanical compliance. The wall is able to flex or deform under pressure even if the bump is formed from high-temperature metal. These mechanically compliant bumps facilitate sound electrical connections even when an electronics device is brought into contact for bonding out of parallel.
    Type: Grant
    Filed: January 17, 2001
    Date of Patent: May 14, 2002
    Assignee: Aralight, Inc.
    Inventors: Keith W. Goossen, William Y. Jan