Patents Assigned to ASIC Advantage, Inc.
  • Publication number: 20110273207
    Abstract: A junction device driver is provided that includes a current regulator, an inductor coupled with the current regulator, and a switching module coupled with the inductor. The current regulator is configured to generate a current, and the inductor is configured to store energy generated by the current produced by the current regulator. The switching module is configured to control a conduction current for a gate of a junction device. The conduction current is generated, initially, from the stored energy of the inductor to thereby provide a relatively high initial current. As the energy stored in the inductor is discharged, the current level drops to a lower level that is sufficient to maintain the junction device in an “on” state.
    Type: Application
    Filed: May 10, 2011
    Publication date: November 10, 2011
    Applicant: ASIC ADVANTAGE INC.
    Inventor: Charles Coleman
  • Publication number: 20110273208
    Abstract: A junction device driver is provided that includes a current regulator, an inductor coupled with the current regulator, and a switching module coupled with the inductor. The current regulator is configured to generate a current, and the inductor is configured to store energy generated by the current produced by the current regulator. The switching module is configured to control a conduction current for a gate of a junction device. The conduction current is generated, initially, from the stored energy of the inductor to thereby provide a relatively high initial current. As the energy stored in the inductor is discharged, the current level drops to a lower level that is sufficient to maintain the junction device in an “on” state.
    Type: Application
    Filed: May 10, 2011
    Publication date: November 10, 2011
    Applicant: ASIC ADVANTAGE INC.
    Inventor: Charles Coleman
  • Publication number: 20110204923
    Abstract: Methods, systems, and devices are described for providing voltage comparison adapted to operate at high-speeds and over a relatively large range of supply voltages.
    Type: Application
    Filed: January 24, 2011
    Publication date: August 25, 2011
    Applicant: ASIC ADVANTAGE INC.
    Inventor: Sam Seiichiro Ochi
  • Patent number: 7956491
    Abstract: Methods, systems, and devices are described for integrating multiple transformers on a shared core, while avoiding interference between the transformers and other potentially undesirable effects of the integration. In one embodiment, multiple transformers are wound on a shared core. Each transformer is wound on the core, so that its primary and secondary windings are magnetically coupled to each other through the core without being coupled to the windings of other transformers sharing the core. The multiple integrated transformers may then be provided in a circuit arrangement by placing only a single core element in the arrangement.
    Type: Grant
    Filed: March 16, 2009
    Date of Patent: June 7, 2011
    Assignee: ASIC Advantage Inc.
    Inventors: Sam Seiichiro Ochi, Ernest Henry Wittenbreder, Jr.
  • Patent number: 7911255
    Abstract: Methods, systems, and devices are described for providing voltage level shifting that may operate reliably and at low power, even at high voltages and/or high switching frequencies. Embodiments receive an input signal representing input information, and effectively generate two voltage responses as a function of the input signal. Each voltage response includes exponential terms as a function of resistive and capacitive loading effects of components of the embodiments. A combined response signal is generated substantially as a superposition of the first response signal and the second response signal. A high-side driver signal is then generated as a function of the combined response signal, such that the high-side driver signal substantially preserves the input information represented by the input signal, and such that the first exponential response and the second exponential response are substantially absent from the high-side driver signal.
    Type: Grant
    Filed: July 21, 2010
    Date of Patent: March 22, 2011
    Assignee: ASIC Advantage Inc.
    Inventor: Sam Seiichiro Ochi
  • Publication number: 20110032731
    Abstract: Methods, systems, and devices are described for using isolated and non-isolated circuit structures and control methods for achieving multiple independently regulated input and output parameters using a single, simple, primary magnetic circuit element. For example, structures and methods are revealed for achieving single-stage power factor correction with high power factor and multiple independently regulated outputs using a single, simple, primary magnetic circuit element. Other structures and methods are revealed for achieving multiple independently regulated outputs without power factor correction using a single primary magnetic circuit element for both isolated and non-isolated power conversion applications.
    Type: Application
    Filed: August 4, 2010
    Publication date: February 10, 2011
    Applicant: ASIC Advantage Inc.
    Inventors: Charles Coleman, George Rasko, Sam Seiichiro Ochi, Ernest H. Wittenbreder, JR.
  • Publication number: 20100328971
    Abstract: Methods, systems, and devices are described for using coupled inductor boost circuits to operate in a zero current switching (ZCS) and/or a zero voltage switching (ZVS) boundary mode. Some embodiments include a coupled inductor boost circuit that can substantially eliminate rectifier reverse recovery effects without using a high side primary switch and a high side primary switch driver. Other embodiments include a coupled inductor boost circuit that can achieve substantially zero voltage switching. ZCS and ZVS modes may be effectuated using control techniques. For example, a magnetizing current may be sensed or otherwise represented, and a signal may be generated accordingly for controlling switching of the controller.
    Type: Application
    Filed: June 28, 2010
    Publication date: December 30, 2010
    Applicant: ASIC Advantage Inc.
    Inventors: George Rasko, Ernest H. Wittenbreder, JR.
  • Publication number: 20100315150
    Abstract: Methods, systems, and devices are described for providing voltage level shifting that may operate reliably and at low power, even at high voltages and/or high switching frequencies. Embodiments receive an input signal representing input information, and effectively generate two voltage responses as a function of the input signal. Each voltage response includes exponential terms as a function of resistive and capacitive loading effects of components of the embodiments. A combined response signal is generated substantially as a superposition of the first response signal and the second response signal. A high-side driver signal is then generated as a function of the combined response signal, such that the high-side driver signal substantially preserves the input information represented by the input signal, and such that the first exponential response and the second exponential response are substantially absent from the high-side driver signal.
    Type: Application
    Filed: July 21, 2010
    Publication date: December 16, 2010
    Applicant: ASIC Advantage Inc.
    Inventor: Sam Seiichiro Ochi
  • Publication number: 20100225277
    Abstract: Methods, systems, and devices are described for described for providing control circuitry for use with battery packs. Embodiments optimize charging and discharging cycles to mitigate overcharging, over-discharging, and/or overheating individual cells in a battery pack. For example, embodiments allow for full discharging of battery packs (i.e., bringing the battery pack and its individual cells closer to their minimum voltages without going below) and full charging of battery packs (i.e., charging each cell of the battery pack closer to their maximum voltages without exceeding). Further, some embodiments include a substantially lossless, bi-directional DC-to-DC converter for facilitating ultra-fast charging of battery packs (e.g., at greater than 10C charge rates) without overheating or overcharging the individual cells of the battery packs.
    Type: Application
    Filed: March 8, 2010
    Publication date: September 9, 2010
    Applicant: ASIC Advantage Inc.
    Inventors: Sam Seiichiro Ochi, Pierre R. Irissou, Charles Coleman
  • Patent number: 7782115
    Abstract: Methods, systems, and devices are described for providing voltage level shifting that may operate reliably and at low power, even at high voltages and/or high switching frequencies. Embodiments receive an input signal representing input information, and effectively generate two voltage responses as a function of the input signal. Each voltage response includes exponential terms as a function of resistive and capacitive loading effects of components of the embodiments. A combined response signal is generated substantially as a superposition of the first response signal and the second response signal. A high-side driver signal is then generated as a function of the combined response signal, such that the high-side driver signal substantially preserves the input information represented by the input signal, and such that the first exponential response and the second exponential response are substantially absent from the high-side driver signal.
    Type: Grant
    Filed: April 10, 2009
    Date of Patent: August 24, 2010
    Assignee: ASIC Advantage Inc.
    Inventor: Sam Seiichiro Ochi
  • Publication number: 20100033146
    Abstract: Methods, systems, and devices are described for providing output (e.g., current) sensing and feedback in high-voltage switching power converter topologies. Certain aspects of high voltage switching converter topologies may make output (e.g., current) sensing difficult. In some embodiments, a sampling module implements sample-and-hold techniques in a low-side switch converter topology to provide reliable current sensing. Embodiments of the sampling module provide certain functionality, including integration, blanking, buffering, and adjustable sampling frequency. Further, some embodiments include feedback functionality for generating a converter driver signal (for driving the switching converter) and/or a sample driver signal (for driving the sampling module) as a function of sensed output feedback from the sampling module.
    Type: Application
    Filed: August 6, 2009
    Publication date: February 11, 2010
    Applicant: ASIC Advantage Inc.
    Inventors: Pierre Irissou, Etienne Colmet-Daage
  • Publication number: 20100033150
    Abstract: Methods, systems, and devices are provided for optimizing a bus voltage supplied to a switching power converter to keep the duty cycle of the switching power converter to within a desirable operating range. In some embodiments, the duty cycle of the switching signal used to drive the switching power converter is monitored (e.g., indirectly) to determine whether the duty cycle is approaching an undesirable level. For example, as the duty cycle decreases (e.g., approaches or crosses a certain threshold), embodiments decrease the bus voltage. This may, in turn, allow the switching power converter to output substantially the same output to the load, while using a more efficient (e.g., larger) duty cycle. Certain embodiments use similar techniques, along with certain bus voltage optimization techniques, to control a bus voltage as a function of feedback from multiple switching power converters.
    Type: Application
    Filed: August 6, 2009
    Publication date: February 11, 2010
    Applicant: ASIC Advantage Inc.
    Inventors: Pierre Irissou, Etienne Colmet-Daage
  • Publication number: 20090295228
    Abstract: Methods, systems, and devices are described for auxiliary power with low standby power consumption. Switching power converters typically include a switching power element (e.g., a power transistor), driven by a switching controller (e.g., including a gate driver). The power output of the switching power converter may be a function of the switching signal provided by the switching controller. For example, a pulse-width modulated (“PWM”) signal may be used to drive the switching power element, and the output of the switching controller may be adjusted by adjusting the frequency and/or duty cycle of the PWM signal. Embodiments implement cycle extension techniques to effectively extend a portion of the PWM signal to generate additional charge. The additional charge may be used to power an auxiliary power unit. The auxiliary power unit may then be used to drive the switching controller and/or to provide a source of power for other internal or external components.
    Type: Application
    Filed: May 27, 2009
    Publication date: December 3, 2009
    Applicant: ASIC Advantage Inc.
    Inventor: Sam Seiichiro Ochi
  • Publication number: 20090256617
    Abstract: Methods, systems, and devices are described for providing voltage level shifting that may operate reliably and at low power, even at high voltages and/or high switching frequencies. Embodiments receive an input signal representing input information, and effectively generate two voltage responses as a function of the input signal. Each voltage response includes exponential terms as a function of resistive and capacitive loading effects of components of the embodiments. A combined response signal is generated substantially as a superposition of the first response signal and the second response signal. A high-side driver signal is then generated as a function of the combined response signal, such that the high-side driver signal substantially preserves the input information represented by the input signal, and such that the first exponential response and the second exponential response are substantially absent from the high-side driver signal.
    Type: Application
    Filed: April 10, 2009
    Publication date: October 15, 2009
    Applicant: ASIC Advantage Inc.
    Inventor: Sam Seiichiro Ochi
  • Publication number: 20090243683
    Abstract: Methods, systems, and devices are described for providing a communication system for handling pulse information. Embodiments of the invention provide a pulse shaping unit operable to avoid saturation of the pulse transformer, while being easily incorporated into IC processes. Some embodiments of the pulse shaping unit provide a two-to-three level driver unit for converting a two-level input voltage signal to a three-level driver signal for driving a pulse transformer. Other embodiments of the pulse shaping unit provide components configured to differentially drive a pulse transformer, effectively converting a two-level input voltage signal to a three-level driver signal.
    Type: Application
    Filed: April 1, 2009
    Publication date: October 1, 2009
    Applicant: ASIC Advantage, Inc.
    Inventors: Sam Seiichiro Ochi, Charles Coleman
  • Publication number: 20090243582
    Abstract: Methods, systems, and devices are described for sensing a phase-cut dimming signal and outputting a control signal compatible with a switching power circuit. Embodiments of the invention generate at least one of a low-frequency pulse-wave-modulated control signal, an analog output control signal, or a digital (e.g., higher-frequency pulse-wave-modulated) output control signal. Some embodiments further provide preloading and/or startup control functionality to allow proper functioning of the circuitry under small-conduction-angle (i.e., highly dimmed) conditions.
    Type: Application
    Filed: March 16, 2009
    Publication date: October 1, 2009
    Applicant: ASIC Advantage Inc.
    Inventors: Pierre Irissou, Etienne Colmet-Daage, Bernard Drexler
  • Publication number: 20090237899
    Abstract: A printed circuit board (PCB) substrate which can be used in a semiconductor package, such as BGA and LGA, has a top surface and a bottom surface. A magnetic component includes a laterally extending bottom plate, two or more vertically extending posts, and a laterally extending top plate, wherein the bottom plate is fully embedded within the PCB substrate and the two or more posts extend in the PCB substrate from the bottom plate toward the upper surface of the PCB substrate. The top plate contacts an end of each of the two or more posts along the top surface of the PCB substrate.
    Type: Application
    Filed: March 23, 2009
    Publication date: September 24, 2009
    Applicant: ASIC Advantage Inc.
    Inventor: Courtney R. Furnival
  • Publication number: 20090230776
    Abstract: Methods, systems, and devices are described for integrating multiple transformers on a shared core, while avoiding interference between the transformers and other potentially undesirable effects of the integration. In one embodiment, multiple transformers are wound on a shared core. Each transformer is wound on the core, so that its primary and secondary windings are magnetically coupled to each other through the core without being coupled to the windings of other transformers sharing the core. The multiple integrated transformers may then be provided in a circuit arrangement by placing only a single core element in the arrangement.
    Type: Application
    Filed: March 16, 2009
    Publication date: September 17, 2009
    Applicant: ASIC Advantage Inc.
    Inventors: Sam Seiichiro Ochi, Ernest Henry Wittenbreder, JR.
  • Patent number: 6636025
    Abstract: An integrated circuit power supply controller for use in a power supply that provides voltage regulating and current limiting functions. A current limit circuit is provided that includes a band-gap circuit for producing a reference voltage for precisely setting the current limit point, with the band-gap circuit being powered by a current sense voltage indicative of the load current rather than being powered by the regulated output voltage. Thus, the current limit circuit will operate even the power supply output is shorted. Voltage control circuitry is provided also includes a band-gap circuit for precisely controlling the magnitude of the regulated output voltage.
    Type: Grant
    Filed: January 9, 2002
    Date of Patent: October 21, 2003
    Assignee: ASIC Advantage, Inc.
    Inventor: Pierre R. Irissou
  • Patent number: 6233165
    Abstract: A power supply arrangement including a transformer and a switching element coupled to a primary winding of the transformer and a power supply. The power supply includes a capacitor having a first terminal coupled to a junction of the primary winding and the switching element and a first diode coupled between the capacitor and an output node. The power supply further includes a discharge element, such as a resistor or a diode, coupled between the junction of the first diode and the capacitor and a power supply common. A voltage regulator, such as a Zener diode, is connected to the output node to produce a regulated voltage powered by the voltage applied to the transformer primary winding, with the regulated voltage being used to power the control circuitry.
    Type: Grant
    Filed: May 15, 2000
    Date of Patent: May 15, 2001
    Assignee: ASIC Advantage, Inc.
    Inventors: Pierre R. Irissou, Hans R. Camenzind