Patents Assigned to Asset Intertech, Inc.
  • Patent number: 9305186
    Abstract: A network of storage units has a data path which is at least a portion of the network. The network also has a key storage unit and a gateway storage unit. If the key storage unit stores a key value, the key storage unit transmits a key signal to the gateway storage unit. If the gateway storage unit does not store a gateway value or the key signal is not transmitted to the gateway storage unit, the gateway storage unit does not insert a data path segment in the data path. If the gateway storage unit stores a gateway value and the key signal is transmitted to the gateway storage unit, the gateway storage unit inserts the data path segment.
    Type: Grant
    Filed: October 7, 2014
    Date of Patent: April 5, 2016
    Assignee: ASSET INTERTECH, INC.
    Inventors: Alfred L. Crouch, John C. Potter
  • Publication number: 20150106792
    Abstract: A system and method of debugging application software operating on a system-on-chip processor (SOC) with a system trace macrocell.
    Type: Application
    Filed: October 16, 2014
    Publication date: April 16, 2015
    Applicant: Asset InterTech, Inc.
    Inventors: Lawrence A. Traylor, Harry S. Myers
  • Patent number: 8881301
    Abstract: A network of storage units has a data path which is at least a portion of the network. The network also has a key storage unit and a gateway storage unit. If the key storage unit stores a key value, the key storage unit transmits a key signal to the gateway storage unit. If the gateway storage unit does not store a gateway value or the key signal is not transmitted to the gateway storage unit, the gateway storage unit does not insert a data path segment in the data path. If the gateway storage unit stores a gateway value and the key signal is transmitted to the gateway storage unit, the gateway storage unit inserts the data path segment.
    Type: Grant
    Filed: October 5, 2010
    Date of Patent: November 4, 2014
    Assignee: Asset Intertech, Inc.
    Inventors: Alfred L. Crouch, John C. Potter
  • Patent number: 7590504
    Abstract: A graphical user interface (GUI) that configures a test for a circuit. More particularly, the circuit includes a built-in-self-test (BIST) compatible device and has a test configuration. The device has an associated value. Moreover, the circuit, the device, and the associated value are defined in a circuit definition. The GUI includes a GUI object representing the circuit, a GUI object representing the BIST compatible device, and a GUI object representing the associated value. Furthermore, at least one of the GUI objects is configured to allow a modification to the GUI object and to reconfigure the test configuration in response to the GUI object modification. Also, the GUI object is further configured to modify itself to reflect a modification of the circuit definition. More particularly, the device may be an interconnect built-in self-test (IBIST) compatible device having registers, ports and lanes of the ports.
    Type: Grant
    Filed: August 16, 2006
    Date of Patent: September 15, 2009
    Assignee: ASSET InterTech, Inc.
    Inventors: James Ernest Chorn, Thomas Green Hudiburgh, Jay Joseph Nejedlo, Edward Keith Simpson
  • Patent number: 7562274
    Abstract: Methods and apparatus for performing a data driven test on a circuit including at least one built-in-self-test compatible device. In one embodiment, the method includes describing the device using a descriptive language including setting at least one default value associated with the device. The method also includes defining a scan path associated with the device, defining a netlist of the circuit, and configuring a test control program for the circuit. Additionally, the method includes changing the default value associated with the device. Testing the circuit after changing the value and using the test control program is also included wherein a portion of the test control program associated with the value remains substantially unmodified.
    Type: Grant
    Filed: August 16, 2006
    Date of Patent: July 14, 2009
    Assignee: Asset Intertech, Inc.
    Inventors: James Ernest Chorn, Thomas Green Hudiburgh, Jay Joseph Nejedlo, Edward Keith Simpson, Walter Michael Coldewey
  • Publication number: 20070079199
    Abstract: Methods and apparatus for performing a data driven test on a circuit including at least one built-in-self-test compatible device. In one embodiment, the method includes describing the device using a descriptive language including setting at least one default value associated with the device. The method also includes defining a scan path associated with the device, defining a netlist of the circuit, and configuring a test control program for the circuit. Additionally, the method includes changing the default value associated with the device. Testing the circuit after changing the value and using the test control program is also included wherein a portion of the test control program associated with the value remains substantially unmodified.
    Type: Application
    Filed: August 16, 2006
    Publication date: April 5, 2007
    Applicant: ASSET InterTech, Inc.
    Inventors: James Chorn, Thomas Hudiburgh, Jay Nejedlo, Edward Simpson, Walter Coldewey
  • Publication number: 20070073507
    Abstract: A graphic user interface for configuring a test control program for a circuit. More particularly the circuit includes a built-in-self-test compatible device and has a test configuration. The device has an associated value. Moreover, the circuit, the device, and the value are defined in a circuit definition. The interface includes an object representing the circuit, an object representing the device, and an object representing the value. Furthermore, at least one of the objects is configured and adapted to allow a modification to the object and to reconfigure the test configuration program in response to the object modification. Also, the object is further configured and adapted to modify itself to reflect a modification of the circuit definition. More particularly, the device may be an IBIST compatible device having registers, ports and lanes of the ports. Methods of, and computer programs for, configuring test control programs are also provided.
    Type: Application
    Filed: August 16, 2006
    Publication date: March 29, 2007
    Applicant: ASSET InterTech, Inc.
    Inventors: James Chorn, Thomas Hudiburgh, Jay Nejedlo, Edward Simpson