Patents Assigned to Austron, Inc.
  • Patent number: 5220333
    Abstract: A method and apparatus for determining Universal Coordinated Time from Loran-C transmissions at at least two Group Repetition Intervals. With time known to within a few seconds of Universal Coordinated Time, and position known to within approximately five miles, the present invention permits time transfer substantially to Universal Coordinated Time by receiving first and second Loran-C transmissions at first and second Group Repetition Intervals. Then, a coincidence interval between the two Group Repetition Intervals is calculated, and time is transferred to coincide substantially with Universal Coordinated Time based on the calculated coincidence interval.
    Type: Grant
    Filed: July 2, 1992
    Date of Patent: June 15, 1993
    Assignee: Austron Inc.
    Inventor: Bruce M. Penrod
  • Patent number: 4839613
    Abstract: A disciplined frequency standard includes an adaptive control loop to correct for ambient temperature effects. The crystal resonator of the disciplined frequency standard is enclosed within an oven which is heated by current applied through a resistive heater. A small current sensing resistor is inserted in series between the oven current source and the oven heater to produce a voltage drop which is proportional to oven current. An analog temperature signal T is derived from the voltage drop and is multiplied with a frequency/temperature parameter dF/dT to produce a compound temperature correction factor UT. The frequency/temperature parameter U and an aging drift parameter B are measured in control loops which are weighted by averaging time parameters K, L, respectively. The measured values of B, U are stored and the weighting factors K, L are adjusted according to the variance of the most recent measurement from the stored average.
    Type: Grant
    Filed: May 31, 1988
    Date of Patent: June 13, 1989
    Assignee: Austron, Inc.
    Inventors: James D. Echols, James A. Barnes, Bruce M. Penrod
  • Patent number: 4740761
    Abstract: A predetermined bias voltage is applied to the input of a summing integrator in a frequency lock loop to provide fine tuning control of a voltage controlled crystal oscillator. In this arrangement, the predetermined bias voltage is summed and integrated with a phase error signal to alter the output frequency of the voltage controlled crystal oscillator. Since the servo loop operates to null the net voltage at the input of the integrator, the circuit induces a frequency error which just compensates for the intentional voltage offset bias applied to the integrator. The offset bias arrangement produces incremental offsets within a total range of about three parts in ten to the eleventh power and permits the output frequency of an atomic frequency standard to be accurately and stably adjusted in small increments to agree closely with the frequency of a national standard or other system reference.
    Type: Grant
    Filed: December 23, 1986
    Date of Patent: April 26, 1988
    Assignee: Austron, Inc.
    Inventors: James A. Barnes, Enrico A. Rodrigo