Abstract: A module of capacitor assemblies is provided. To increase the capacitance and efficiency of the module, capacitor assemblies may be stacked. A variety of aspects of the module are controlled in the present invention, including the number of capacitor assemblies, the manner in which the capacitor assemblies are arranged and incorporated into the module, and the manner in which the capacitor assemblies are formed. For example, the anode terminations of each capacitor assembly are electrically connected and the cathode terminations of each capacitor assembly are electrically connected. The capacitance and efficiency of the module can be improved while maintaining the footprint of a single capacitor assembly.

Abstract: A capacitor comprising a solid electrolytic capacitor element that contains a sintered porous anode body, a dielectric that overlies the anode body, and a solid electrolyte is provided. The solid electrolyte contains an interior conductive polymer layer overlying the dielectric, an adhesive film that overlies the interior conductive polymer layer, which may be formed by sequential vapor deposition. An exterior conductive polymer layer also overlies the adhesive film.

Abstract: A capacitor assembly that is capable of exhibiting good electrical properties even under a variety of conditions is provided. More particularly, the capacitor contains a capacitor element that includes a sintered porous anode body, a dielectric that overlies the anode body, and a pre-coat layer that overlies the dielectric and is formed from an organometallic compound. A solid electrolyte overlies the pre-coat layer that contains an inner layer and an outer layer, wherein the inner layer is formed from an in situ-polymerized conductive polymer and the outer layer is formed from pre-polymerized conductive polymer particles.

Abstract: A surface-mountable component is disclosed. The surface-mountable component may include a substrate having a side surface and a top surface that is perpendicular to the side surface. The component may include an element layer formed on the top surface of the substrate. The element layer may include a thin-film element and a contact pad electrically connected with the thin-film element. The contact pad may extend to the side surface of the substrate. The component may include a terminal that is electrically connected with the contact pad at a connection area. The connection area may be parallel with the top surface of the substrate. The terminal may have a visible edge surface that is approximately aligned with the side surface of the substrate. The visible edge surface may be visible for inspection when the surface-mountable component is mounted to a mounting surface.

Abstract: A phased array antenna is provided. The phased array antenna includes a tube shaped substrate. The phased array antenna further includes a plurality of antenna elements disposed on the substrate.

Abstract: A capacitor comprising a solid electrolytic capacitor element that contains a sintered porous anode body, a dielectric that overlies the anode body, and a solid electrolyte that overlies the dielectric. The capacitor further contains a barrier film that is formed by vapor deposition and that is positioned between the dielectric and the solid electrolyte or overlies the dielectric.

Abstract: A phased array antenna is provided. The phased array antenna includes a dome shaped substrate. The phased array antenna further includes a plurality of antenna elements disposed on the substrate.

Abstract: A meter for measuring a flow of a product is disclosed. The meter includes a sensor configured to sense the flow of the product and a microcomputer communicatively coupled with the sensor and configured to measure the flow of the product based on signals received from the sensor. The meter also includes at least one supercapacitor electrically coupled with the microcomputer and configured to supply power to the microcomputer.

Abstract: In general, a varistor including a passivation layer and a method of forming such a varistor are disclosed. The varistor comprises a ceramic body comprising a plurality of alternating dielectric layers and electrode layers. The varistor also comprises a first external terminal on a first end surface and a second external terminal on a second end surface opposite the first end surface wherein at least two side surfaces extend between the first end surface and the second end surface. The varistor also comprises a passivation layer on at least one side surface of the ceramic body between the first external terminal and the second external terminal. The passivation layer includes a phosphate and a metal additive including an alkali metal, an alkaline earth metal, or a mixture thereof. The passivation layer has an average thickness of from 0.1 microns to 30 microns.

Abstract: The present invention is directed to a multilayer ceramic capacitor comprising a first external terminal disposed along a first end, a second external terminal disposed along a second end that is opposite the first end, and an active electrode region containing alternating dielectric layers and active electrode layers. At least one of the electrode layers comprises a first electrode and a second electrode. The first electrode is electrically connected with the first external terminal and has a first electrode arm comprising a main portion and a step portion. The main portion has a lateral edge extending from the first end of the multilayer capacitor and the step portion has a lateral edge offset from the lateral edge of the main portion. The second electrode is electrically connected with the second external terminal.

Abstract: The invention is directed to a multilayer ceramic capacitor comprising a top surface and an opposing bottom surface and four side surfaces that extend between the top and bottom surfaces, a main body formed from a plurality of dielectric layers and a plurality of internal electrode layers alternately arranged, and external terminals electrically connected to the internal electrode layers wherein a first external terminal is disposed along the top surface and a second external terminal is disposed along the bottom surface. The internal electrode layer includes a first electrode electrically connected to the first external terminal and a second counter electrode electrically connected to the second external terminal, wherein the first electrode includes a central portion extending from the first external terminal toward the second external terminal and wherein the central portion extends 40% to less than 100% a distance from the first external terminal to the second external terminal.

Abstract: A capacitor that comprises a capacitor element that includes an anode that contains a dielectric formed on a sintered porous body, a solid electrolyte overlying the anode that contains manganese dioxide, and a cathode coating is provided. The cathode coating includes a barrier layer overlying the solid electrolyte and a metallization layer overlying the barrier layer. The barrier layer contains a valve metal and the metallization layer contains a metal that exhibits an electrical resistivity of about 150 n?·m or less (at a temperature of 20° C.) and an electric potential of about ?0.5 V or more.

Abstract: The present invention is directed to a varistor comprising a dielectric material comprising a sintered ceramic composed of zinc oxide grains and a grain boundary layer between the zinc oxide grains. The grain boundary layer contains a positive temperature coefficient thermistor material in an amount of less than 10 mol % based on the grain boundary layer.

Abstract: A system and method for determining the lifetime of a capacitor element, specifically a capacitor element comprising a solid electrolyte that undergoes oxidation, is provided. The system and method utilize a capacitor element comprising an anode body, a dielectric, and a solid electrolyte, and may also comprise other stages of the production of a capacitor. The system and method provide an estimation of the life of the capacitor while considering the oxidation of the solid electrolyte.

Abstract: A wet electrolytic capacitor is provided. The capacitor comprises an anode that comprises an anodically oxidized pellet formed from a pressed and sintered valve metal powder, a cathode that comprises a metal substrate coated with a conductive coating, a microporous membrane that is positioned between the anode and cathode and contains an olefin polymer having a weight-average molecular weight of about 1,000,000 grams per mole or more, and a fluidic working electrolyte in communication with the anode and the cathode.

Abstract: This disclosure provides a method and apparatus for connecting insulated wires to electrical components. More specifically, an apparatus that includes a wire guide designed to assist with the alignment of wires prior to termination of the wires to electrical components is disclosed. In an embodiment, the wire guide includes a body portion and a latching portion. The body portion includes at least one wire opening and is configured to mechanically secure one or more insulated wires in a desirable position. The latching portion is configured to secure the wire guide to a corresponding device such as an insulation displacement contact connector. A wire guide allows for insulated wires to be quickly and reliably positioned and secured relative to one another in order to safely and efficiently electrically and mechanically connect each insulated wire to a corresponding electrical component.

Abstract: A system including an electrical header connector assembly is provided. The electrical header connector assembly includes an insulated body with a mating body portion and a strain relief portion, a first self-shorting contact and a second self-shorting contact. Each self-shorting contact includes a contact tail with a wire receiving recess and a contact blade extending opposite and substantially parallel to the contact tail. Each self-shorting contact further includes a shorting beam extending opposite the contact tail. The shorting beam includes a curved portion extending away from the contact blade and a bent tip portion extending toward the contact blade. The shorting beam of the first self-shorting contact is configured to touch the shorting beam of the second self-shorting contact when the electrical header is in a neutral position.

Abstract: A tunable multilayer capacitor array is provided. The tunable multilayer capacitor includes a plurality of tunable multilayer capacitors that are connected in parallel. The tunable multilayer capacitor has an initial capacitance value greater than about 0.1 microFarads at an operating voltage greater than about 10 volts. The tunable multilayer capacitor is configured to have a tunable capacitance by applying a DC bias voltage to the tunable multilayer capacitor array.

Abstract: A high frequency coupler is disclosed that is configured for grid array-type surface mounting. The coupler includes a monolithic base substrate having a top surface and a bottom surface. A first thin film microstrip and a second thin film microstrip are each disposed on the top surface of the monolithic base substrate. Each microstrip has an input end and an output end. At least one via extends through the monolithic base substrate from the top surface to the bottom surface of the monolithic base substrate. The via(s) are electrically connected with at least one of the input end or the output end of the first microstrip or the second microstrip. The coupler has a coupling factor that is greater than about ?30 dB at about 28 GHz.

Abstract: A multilayer ceramic capacitor is disclosed including a first external terminal disposed along a first end of the capacitor, a second external terminal disposed along a second end of the capacitor opposite the first end, an active electrode region containing alternating dielectric layers and active electrode layers, and a shield electrode region including at least two shield electrodes that are spaced apart by a shield layer gap in the longitudinal direction. The distance from the active electrode region to the shield electrode region may range from about 4% to about 20% of a thickness of the capacitor between a top surface and a bottom surface opposing the top surface. The shield layer gap may range from about 3% to about 60% of an external terminal gap between the first external terminal and second external terminal in the longitudinal direction on at least one of the top or bottom surfaces.